crypto: sun4i-ss - handle BigEndian for cipher

commit 5ab6177fa02df15cd8a02a1f1fb361d2d5d8b946 upstream.

Ciphers produce invalid results on BE.
Key and IV need to be written in LE.

Fixes: 6298e948215f2 ("crypto: sunxi-ss - Add Allwinner Security System crypto accelerator")
Cc: <stable@vger.kernel.org>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
index f4796e5..d646d2d 100644 (file)
--- a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
+++ b/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
@@ -54,13 +54,13 @@ static int noinline_for_stack sun4i_ss_opti_poll(struct skcipher_request *areq)
 
        spin_lock_irqsave(&ss->slock, flags);
 
-       for (i = 0; i < op->keylen; i += 4)
-               writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
+       for (i = 0; i < op->keylen / 4; i++)
+               writesl(ss->base + SS_KEY0 + i * 4, &op->key[i], 1);
 
        if (areq->iv) {
                for (i = 0; i < 4 && i < ivsize / 4; i++) {
                        v = *(u32 *)(areq->iv + i * 4);
-                       writel(v, ss->base + SS_IV0 + i * 4);
+                       writesl(ss->base + SS_IV0 + i * 4, &v, 1);
                }
        }
        writel(mode, ss->base + SS_CTL);
@@ -238,13 +238,13 @@ static int sun4i_ss_cipher_poll(struct skcipher_request *areq)
 
        spin_lock_irqsave(&ss->slock, flags);
 
-       for (i = 0; i < op->keylen; i += 4)
-               writel(*(op->key + i / 4), ss->base + SS_KEY0 + i);
+       for (i = 0; i < op->keylen / 4; i++)
+               writesl(ss->base + SS_KEY0 + i * 4, &op->key[i], 1);
 
        if (areq->iv) {
                for (i = 0; i < 4 && i < ivsize / 4; i++) {
                        v = *(u32 *)(areq->iv + i * 4);
-                       writel(v, ss->base + SS_IV0 + i * 4);
+                       writesl(ss->base + SS_IV0 + i * 4, &v, 1);
                }
        }
        writel(mode, ss->base + SS_CTL);