MLK-15330-2: ARM64: imx8qm/qxp: modify all device nodes using edmav3

Modify all device nodes which use edmav3,since dma-cell down from 4 to
3.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index 813f970..43d029b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -1723,8 +1723,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart1>;
                dma-names = "tx","rx";
-               dmas = <&edma0 15 0 0 0>,
-                       <&edma0 14 0 1 0>;
+               dmas = <&edma0 15 0 0>,
+                       <&edma0 14 0 1>;
                status = "disabled";
        };
 
@@ -1740,8 +1740,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart2>;
                dma-names = "tx","rx";
-               dmas = <&edma0 17 0 0 0>,
-                       <&edma0 16 0 1 0>;
+               dmas = <&edma0 17 0 0>,
+                       <&edma0 16 0 1>;
                status = "disabled";
        };
 
@@ -1757,8 +1757,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart3>;
                dma-names = "tx","rx";
-               dmas = <&edma0 19 0 0 0>,
-                       <&edma0 18 0 1 0>;
+               dmas = <&edma0 19 0 0>,
+                       <&edma0 18 0 1>;
                status = "disabled";
        };
 
@@ -1774,8 +1774,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart4>;
                dma-names = "tx","rx";
-               dmas = <&edma0 21 0 0 0>,
-                       <&edma0 20 0 1 0>;
+               dmas = <&edma0 21 0 0>,
+                       <&edma0 20 0 1>;
                status = "disabled";
        };
 
@@ -1791,7 +1791,7 @@
                      <0x0 0x5a330000 0x0 0x10000>, /* channel19 UART3 tx */
                      <0x0 0x5a340000 0x0 0x10000>, /* channel20 UART4 rx */
                      <0x0 0x5a350000 0x0 0x10000>; /* channel21 UART4 tx */
-               #dma-cells = <4>;
+               #dma-cells = <3>;
                dma-channels = <10>;
                interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
@@ -1825,7 +1825,7 @@
                        <0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */
                        <0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */
                        <0x0 0x592d0000 0x0 0x10000>; /* sai0 tx */
-               #dma-cells = <4>;
+               #dma-cells = <3>;
                shared-interrupt;
                dma-channels = <12>;
                interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc0 */
@@ -2136,7 +2136,7 @@
                        <&clk IMX8QM_CLK_DUMMY>,
                        <&clk IMX8QM_CLK_DUMMY>;
                clock-names = "core", "extal", "fsys", "spba";
-               dmas = <&edma2 6 0 1 0>, <&edma2 7 0 0 0>;
+               dmas = <&edma2 6 0 1>, <&edma2 7 0 0>;
                dma-names = "rx", "tx";
                power-domains = <&pd_esai0>;
                status = "disabled";
@@ -2162,7 +2162,7 @@
                              "rxtx3", "rxtx4",
                              "rxtx5", "rxtx6",
                              "rxtx7", "spba";
-               dmas = <&edma2 8 0 1 0>, <&edma2 9 0 0 0>;
+               dmas = <&edma2 8 0 1>, <&edma2 9 0 0>;
                dma-names = "rx", "tx";
                power-domains = <&pd_spdif0>;
                status = "disabled";
@@ -2179,7 +2179,7 @@
                        <&clk IMX8QM_CLK_DUMMY>;
                clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
                dma-names = "rx", "tx";
-               dmas = <&edma2 12 0 1 0>, <&edma2 13 0 0 0>;
+               dmas = <&edma2 12 0 1>, <&edma2 13 0 0>;
                status = "disabled";
                power-domains = <&pd_sai0>;
        };
@@ -2214,8 +2214,8 @@
                        "asrck_8", "asrck_9", "asrck_a", "asrck_b",
                        "asrck_c", "asrck_d", "asrck_e", "asrck_f",
                        "spba";
-               dmas = <&edma2 0 0 0 0>, <&edma2 1 0 0 0>, <&edma2 2 0 0 0>,
-                       <&edma2 3 0 1 0>, <&edma2 4 0 1 0>, <&edma2 5 0 1 0>;
+               dmas = <&edma2 0 0 0>, <&edma2 1 0 0>, <&edma2 2 0 0>,
+                       <&edma2 3 0 1>, <&edma2 4 0 1>, <&edma2 5 0 1>;
                dma-names = "rxa", "rxb", "rxc",
                                "txa", "txb", "txc";
                fsl,asrc-rate  = <8000>;

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
index cf5dc10..223d858 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2.dts
@@ -115,7 +115,7 @@
                        <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>;
        assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>;
        assigned-clock-rates = <0>, <786432000>, <24576000>, <24576000>, <24576000>;
-       dmas = <&edma2 23 0 1 1>, <&edma2 21 0 0 1>;
+       dmas = <&edma2 23 0 3>, <&edma2 21 0 2>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
index 2884b77..176a41a 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
@@ -1263,8 +1263,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart1>;
                dma-names = "tx","rx";
-               dmas = <&edma0 11 0 0 0>,
-                       <&edma0 10 0 1 0>;
+               dmas = <&edma0 11 0 0>,
+                       <&edma0 10 0 1>;
                status = "disabled";
        };
 
@@ -1280,8 +1280,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart2>;
                dma-names = "tx","rx";
-               dmas = <&edma0 13 0 0 0>,
-                       <&edma0 12 0 1 0>;
+               dmas = <&edma0 13 0 0>,
+                       <&edma0 12 0 1>;
                status = "disabled";
        };
 
@@ -1297,8 +1297,8 @@
                assigned-clock-rates = <80000000>;
                power-domains = <&pd_dma_lpuart3>;
                dma-names = "tx","rx";
-               dmas = <&edma0 15 0 0 0>,
-                       <&edma0 14 0 1 0>;
+               dmas = <&edma0 15 0 0>,
+                       <&edma0 14 0 1>;
                status = "disabled";
        };
 
@@ -1312,7 +1312,7 @@
                      <0x0 0x5a2d0000 0x0 0x10000>, /* channel13 UART2 tx */
                      <0x0 0x5a2e0000 0x0 0x10000>, /* channel14 UART3 rx */
                      <0x0 0x5a2f0000 0x0 0x10000>; /* channel15 UART3 tx */
-               #dma-cells = <4>;
+               #dma-cells = <3>;
                dma-channels = <8>;
                interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>,
@@ -1345,7 +1345,7 @@
                        <0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */
                        <0x0 0x59350000 0x0 0x10000>,
                        <0x0 0x59370000 0x0 0x10000>;
-               #dma-cells = <4>;
+               #dma-cells = <3>;
                shared-interrupt;
                dma-channels = <14>;
                interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */
@@ -1391,7 +1391,7 @@
                        <&clk IMX8QXP_CLK_DUMMY>;
                clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
                dma-names = "rx", "tx";
-               dmas = <&edma2 12 0 1 0>, <&edma2 13 0 0 0>;
+               dmas = <&edma2 12 0 1>, <&edma2 13 0 0>;
                status = "disabled";
                power-domains = <&pd_sai0>;
        };
@@ -1426,8 +1426,8 @@
                        "asrck_8", "asrck_9", "asrck_a", "asrck_b",
                        "asrck_c", "asrck_d", "asrck_e", "asrck_f",
                        "spba";
-               dmas = <&edma2 0 0 0 0>, <&edma2 1 0 0 0>, <&edma2 2 0 0 0>,
-                       <&edma2 3 0 1 0>, <&edma2 4 0 1 0>, <&edma2 5 0 1 0>;
+               dmas = <&edma2 0 0 0>, <&edma2 1 0 0>, <&edma2 2 0 0>,
+                       <&edma2 3 0 1>, <&edma2 4 0 1>, <&edma2 5 0 1>;
                dma-names = "rxa", "rxb", "rxc",
                                "txa", "txb", "txc";
                fsl,asrc-rate  = <8000>;
@@ -1538,7 +1538,7 @@
                        <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>,
                        <&clk IMX8QXP_AUD_ESAI_0_IPG>;
                clock-names = "core", "extal", "fsys";
-               dmas = <&edma2 6 0 1 0>, <&edma2 7 0 0 0>;
+               dmas = <&edma2 6 0 1>, <&edma2 7 0 0>;
                dma-names = "rx", "tx";
                power-domains = <&pd_esai0>;
                status = "disabled";