ARM: dts: stm32: Add LPtimer support to stm32mp157c

Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index c81f7ed..509347c 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -283,6 +283,33 @@
                        };
                };
 
+               lptimer1: timer@40009000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x40009000 0x400>;
+                       clocks = <&rcc LPTIM1_K>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@0 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <0>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+               };
+
                usart2: serial@4000e000 {
                        compatible = "st,stm32h7-uart";
                        reg = <0x4000e000 0x400>;
@@ -450,6 +477,83 @@
                        #reset-cells = <1>;
                };
 
+               lptimer2: timer@50021000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50021000 0x400>;
+                       clocks = <&rcc LPTIM2_K>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@1 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <1>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer3: timer@50022000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50022000 0x400>;
+                       clocks = <&rcc LPTIM3_K>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+
+                       trigger@2 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <2>;
+                               status = "disabled";
+                       };
+               };
+
+               lptimer4: timer@50023000 {
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50023000 0x400>;
+                       clocks = <&rcc LPTIM4_K>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+               };
+
+               lptimer5: timer@50024000 {
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x50024000 0x400>;
+                       clocks = <&rcc LPTIM5_K>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               #pwm-cells = <3>;
+                               status = "disabled";
+                       };
+               };
+
                vrefbuf: vrefbuf@50025000 {
                        compatible = "st,stm32-vrefbuf";
                        reg = <0x50025000 0x8>;