MLK-13347 dts: mx6sll: enable DCP and hardware RNG for i.mx6sll

Add DCP and RNG node in imx6sll.dtsi to enable them.

Signed-off-by: ye li <ye.li@nxp.com>

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 017c608..b9919fc 100644 (file)
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -640,12 +640,14 @@
                        };
 
                        dcp: dcp@020fc000 {
+                               compatible = "fsl,imx6sl-dcp";
                                reg = <0x020fc000 0x4000>;
                                interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
                                             <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
-                               status = "disabled";
-                       };
+                               clocks = <&clks IMX6SLL_CLK_DCP>;
+                               clock-names = "dcp";
+                       }; 
                };
 
                aips2: aips-bus@02100000 {
@@ -772,6 +774,13 @@
                                reg = <0x021b0000 0x4000>;
                        };
 
+                       rngb: rngb@021b4000 {
+                               compatible = "fsl,imx6sl-rng", "fsl,imx-rng", "imx-rng";
+                               reg = <0x021b4000 0x4000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks =  <&clks IMX6SLL_CLK_DUMMY>;
+                       };
+
                        ocotp: ocotp-ctrl@021bc000 {
                                compatible = "fsl,imx6sll-ocotp", "syscon";
                                reg = <0x021bc000 0x4000>;