MLK-17368-2: drm: imx: dcss: split dcss_ctxld_write

In order for DTRC to work properly, we need to be able to write the DCTL
registers (to switch banks), just before activating CTXLD. However,
__dcss_ctxld_enable() function is usually called from irq context, or
whn the mutex is taken. Hence, create a function the can be called from
irq context.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>

diff --git a/drivers/gpu/imx/dcss/dcss-ctxld.c b/drivers/gpu/imx/dcss/dcss-ctxld.c
index 5ec2a12..01c05c3 100644 (file)
--- a/drivers/gpu/imx/dcss/dcss-ctxld.c
+++ b/drivers/gpu/imx/dcss/dcss-ctxld.c
@@ -391,7 +391,8 @@ int dcss_ctxld_enable(struct dcss_soc *dcss)
 }
 EXPORT_SYMBOL(dcss_ctxld_enable);
 
-void dcss_ctxld_write(struct dcss_soc *dcss, u32 ctx_id, u32 val, u32 reg_ofs)
+void dcss_ctxld_write_irqsafe(struct dcss_soc *dcss, u32 ctx_id, u32 val,
+                             u32 reg_ofs)
 {
        struct dcss_ctxld_priv *ctxld = dcss->ctxld_priv;
        int curr_ctx = ctxld->current_ctx;
@@ -405,10 +406,17 @@ void dcss_ctxld_write(struct dcss_soc *dcss, u32 ctx_id, u32 val, u32 reg_ofs)
        /* if we hit this, we've got to increase the maximum context size */
        BUG_ON(dcss_ctxld_ctx_size[ctx_id] - 1 < item_idx);
 
-       mutex_lock(&ctxld->mutex);
        ctx[ctx_id][item_idx].val = val;
        ctx[ctx_id][item_idx].ofs = reg_ofs;
        ctxld->ctx_size[curr_ctx][ctx_id] += 1;
+}
+
+void dcss_ctxld_write(struct dcss_soc *dcss, u32 ctx_id, u32 val, u32 reg_ofs)
+{
+       struct dcss_ctxld_priv *ctxld = dcss->ctxld_priv;
+
+       mutex_lock(&ctxld->mutex);
+       dcss_ctxld_write_irqsafe(dcss, ctx_id, val, reg_ofs);
        mutex_unlock(&ctxld->mutex);
 }
 

diff --git a/drivers/gpu/imx/dcss/dcss-prv.h b/drivers/gpu/imx/dcss/dcss-prv.h
index f0c4baf..399a135 100644 (file)
--- a/drivers/gpu/imx/dcss/dcss-prv.h
+++ b/drivers/gpu/imx/dcss/dcss-prv.h
@@ -77,6 +77,8 @@ void dcss_ctxld_update(struct dcss_soc *dcss, u32 ctx_id, u32 val, u32 mask,
 void dcss_ctxld_dump(struct seq_file *s, void *data);
 int dcss_ctxld_resume(struct dcss_soc *dcss);
 int dcss_ctxld_suspend(struct dcss_soc *dcss);
+void dcss_ctxld_write_irqsafe(struct dcss_soc *dcss, u32 ctx_id, u32 val,
+                             u32 reg_ofs);
 
 /* DPR */
 int dcss_dpr_init(struct dcss_soc *dcss, unsigned long dpr_base);