MLK-19577: dp: Correct vsync and hsync polarity

The hsync and vsync polarity is inverted for display port.
Removes test code that was forcing the vsync and hsync polarity
incorrectly.

Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

diff --git a/drivers/gpu/drm/imx/hdp/imx-dp.c b/drivers/gpu/drm/imx/hdp/imx-dp.c
index 276bd58..401c939 100644 (file)
--- a/drivers/gpu/drm/imx/hdp/imx-dp.c
+++ b/drivers/gpu/drm/imx/hdp/imx-dp.c
@@ -311,7 +311,6 @@ void dp_mode_set(state_struct *state,
        u8 transfer_unit = 64;
        VIC_SYMBOL_RATE sym_rate;
        u8 link_rate;
-       GENERAL_Read_Register_response regresp;
 
        if (hdp->is_edp) {
                /* eDP uses device tree link rate and number of lanes */
@@ -385,16 +384,6 @@ void dp_mode_set(state_struct *state,
                );
        DRM_INFO("CDN_API_DPTX_Set_VIC_blocking (ret = %d)\n", ret);
 
-       CDN_API_General_Read_Register_blocking(state, ADDR_DPTX_FRAMER +
-                                              (DP_FRAMER_SP << 2), &regresp);
-       DRM_INFO("Initial DP_FRAMER_SP: 0x%.2X\n", regresp.val);
-       regresp.val &= ~0x03; // clear HSP and VSP bits
-
-       DRM_INFO("Final DP_FRAMER_SP: 0x%.2X\n", regresp.val);
-       CDN_API_General_Write_Register_blocking(state, ADDR_DPTX_FRAMER +
-                                               (DP_FRAMER_SP << 2),
-                                               regresp.val);
-
        do {
                ret = CDN_API_DPTX_TrainingControl_blocking(state, 1);
                DRM_DEBUG("CDN_API_DPTX_TrainingControl_blocking (ret = %d) start\n",

diff --git a/drivers/mxc/hdp/API_DPTX.c b/drivers/mxc/hdp/API_DPTX.c
index 46f4a74..e2de2cb 100644 (file)
--- a/drivers/mxc/hdp/API_DPTX.c
+++ b/drivers/mxc/hdp/API_DPTX.c
@@ -522,7 +522,7 @@ CDN_API_STATUS CDN_API_DPTX_Set_VIC(state_struct *state,
 
        MSA_HORIZONTAL_1_Param =
            mode->hsync_end - mode->hsync_start +
-           ((mode->flags & DRM_MODE_FLAG_NHSYNC ? 0 : 1) << 15) + (mode->hdisplay << 16);
+           ((mode->flags & DRM_MODE_FLAG_NHSYNC ? 1 : 0) << 15) + (mode->hdisplay << 16);
 
        MSA_VERTICAL_0_Param =
            (mode->flags & DRM_MODE_FLAG_INTERLACE ? (mode->vtotal / 2) : mode->vtotal) +
@@ -530,7 +530,7 @@ CDN_API_STATUS CDN_API_DPTX_Set_VIC(state_struct *state,
 
        MSA_VERTICAL_1_Param =
            (mode->vsync_end - mode->vsync_start +
-                ((mode->flags & DRM_MODE_FLAG_NVSYNC ? 0 : 1) << 15)) +
+                ((mode->flags & DRM_MODE_FLAG_NVSYNC ? 1 : 0) << 15)) +
                ((mode->flags & DRM_MODE_FLAG_INTERLACE ? mode->vdisplay / 2 : mode->vdisplay) << 16);
 
        DP_HORIZONTAL_ADDR_Param = (mode->hdisplay << 16) + mode->hsync;