MLK-13439 ARM: dts: imx6sll: correct clock property for pwm
authorRobby Cai <robby.cai@nxp.com>
Tue, 8 Nov 2016 00:54:14 +0000 (08:54 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:52:34 +0000 (14:52 -0500)
PWM driver expects two clocks, so correct it to meet this requirement.
Otherwise pwm can not work properly, neither does the backlight (using pwm1).

Signed-off-by: Robby Cai <robby.cai@nxp.com>
arch/arm/boot/dts/imx6sll.dtsi

index dd5a38f..9376427 100644 (file)
                                compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm";
                                reg = <0x02080000 0x4000>;
                                interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SLL_CLK_PWM1>;
+                               clocks = <&clks IMX6SLL_CLK_PWM1>,
+                                        <&clks IMX6SLL_CLK_PWM1>;
+                               clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
 
                                compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm";
                                reg = <0x02084000 0x4000>;
                                interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SLL_CLK_PWM2>;
+                               clocks = <&clks IMX6SLL_CLK_PWM2>,
+                                        <&clks IMX6SLL_CLK_PWM2>;
+                               clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
 
                                compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm";
                                reg = <0x02088000 0x4000>;
                                interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SLL_CLK_PWM3>;
+                               clocks = <&clks IMX6SLL_CLK_PWM3>,
+                                        <&clks IMX6SLL_CLK_PWM3>;
+                               clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };
 
                                compatible = "fsl,imx6sll-pwm", "fsl,imx27-pwm";
                                reg = <0x0208c000 0x4000>;
                                interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SLL_CLK_PWM4>;
+                               clocks = <&clks IMX6SLL_CLK_PWM4>,
+                                        <&clks IMX6SLL_CLK_PWM4>;
+                               clock-names = "ipg", "per";
                                #pwm-cells = <2>;
                        };