#define PU_SOC_VOLTAGE_NORMAL 1250000
#define PU_SOC_VOLTAGE_HIGH 1275000
+#define DC_VOLTAGE_MIN 1300000
+#define DC_VOLTAGE_MAX 1400000
#define FREQ_1P2_GHZ 1200000000
#define FREQ_396_MHZ 396000
static struct regulator *arm_reg;
static struct regulator *pu_reg;
static struct regulator *soc_reg;
+static struct regulator *dc_reg;
static struct clk *arm_clk;
static struct clk *pll1_sys_clk;
case PM_SUSPEND_PREPARE:
cpufreq_policy_min_pre_suspend = data->user_policy.min;
data->user_policy.min = data->user_policy.max;
+
+ if (!IS_ERR(dc_reg))
+ regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MAX, 0);
break;
case PM_POST_SUSPEND:
data->user_policy.min = cpufreq_policy_min_pre_suspend;
+
+ if (!IS_ERR(dc_reg))
+ regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0);
break;
default:
break;
goto put_node;
}
+ dc_reg = devm_regulator_get_optional(cpu_dev, "dc");
+ if (!IS_ERR(dc_reg))
+ regulator_set_voltage_tol(dc_reg, DC_VOLTAGE_MIN, 0);
+
/*
* soc_reg sync with arm_reg if arm shares the same regulator
* with soc. Otherwise, regulator common framework will refuse to update