arm64: dts: imx8mq: remove dcss entries from dts files

Remove the DCSS entries from DTS. Will add them back, after the upstream DCSS
driver is added back.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index cf2cdb4..f0b7f9a 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -1165,17 +1165,6 @@
        status = "okay";
 };
 
-&dcss {
-       status = "okay";
-       disp-dev = "hdmi_disp";
-
-       port@0 {
-               dcss_out: endpoint {
-                       remote-endpoint = <&hdmi_in>;
-               };
-       };
-};
-
 &hdmi {
        compatible = "cdn,imx8mq-hdmi";
        lane-mapping = <0xe4>;

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 8b2bba0..b6854be 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1253,34 +1253,6 @@
                                interrupt-controller;
                                #interrupt-cells = <1>;
                        };
-
-                       dcss: dcss@0x32e00000 {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-                               compatible = "nxp,imx8mq-dcss";
-                               reg = <0x32e00000 0x2D000>, <0x32e2f000 0x1000>;
-                               interrupts = <6>, <8>, <9>;
-                               interrupt-names = "ctx_ld", "ctxld_kick", "vblank";
-                               interrupt-parent = <&irqsteer>;
-                               clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
-                                        <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
-                                        <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
-                                        <&clk IMX8MQ_VIDEO2_PLL_OUT>,
-                                        <&clk IMX8MQ_CLK_DISP_DTRC>,
-                                        <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>,
-                                        <&clk IMX8MQ_CLK_PHY_27MHZ>;
-                               clock-names = "apb", "axi", "rtrm", "pix",
-                                       "dtrc", "pll_src", "pll_phy_ref";
-                               assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>,
-                                                 <&clk IMX8MQ_CLK_DISP_RTRM>,
-                                                 <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
-                               assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>,
-                                                        <&clk IMX8MQ_SYS1_PLL_800M>,
-                                                        <&clk IMX8MQ_CLK_27M>;
-                               assigned-clock-rates = <800000000>,
-                                                          <400000000>;
-                               status = "disabled";
-                       };
                };
 
                gpu: gpu@38000000 {