MLK-10205-1 ARM: dts: Create new dts for QSPI on i.MX7D

create a new dts file for QSPI verification on i.MX7D

Signed-off-by: Han Xu <b45815@freescale.com>
(cherry picked and merge from commit 2888c54189b6126519cf4c05094891980f321917)

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 781c4d0..421138b 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -483,6 +483,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
        imx7d-12x12-lpddr3-arm2-enet2.dtb \
        imx7d-12x12-lpddr3-arm2-flexcan.dtb \
        imx7d-12x12-lpddr3-arm2-mipi_dsi.dtb \
+       imx7d-12x12-lpddr3-arm2-qspi.dtb \
        imx7d-12x12-lpddr3-arm2-sai.dtb \
        imx7d-12x12-lpddr3-arm2-mqs.dtb \
        imx7d-19x19-lpddr2-arm2.dtb

diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts
new file mode 100644 (file)
index 0000000..db0133b
--- /dev/null
+++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-qspi.dts
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2015 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx7d-12x12-lpddr3-arm2.dts"
+
+/* disable epdc, conflict with qspi */
+&epdc {
+        status = "disabled";
+};
+
+&iomuxc {
+       qspi1 {
+               pinctrl_qspi1_1: qspi1grp_1 {
+                       fsl,pins = <
+                               MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
+                               MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
+                               MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
+                               MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
+                               MX7D_PAD_EPDC_DATA04__QSPI_A_DQS 0x51
+                               MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
+                               MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
+                               MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x51
+                               MX7D_PAD_EPDC_DATA08__QSPI_B_DATA0 0x51
+                               MX7D_PAD_EPDC_DATA09__QSPI_B_DATA1 0x51
+                               MX7D_PAD_EPDC_DATA10__QSPI_B_DATA2 0x51
+                               MX7D_PAD_EPDC_DATA11__QSPI_B_DATA3 0x51
+                               MX7D_PAD_EPDC_DATA12__QSPI_B_DQS 0x51
+                               MX7D_PAD_EPDC_DATA13__QSPI_B_SCLK 0x51
+                               MX7D_PAD_EPDC_DATA14__QSPI_B_SS0_B 0x51
+                               MX7D_PAD_EPDC_DATA15__QSPI_B_SS1_B 0x51
+                       >;
+               };
+       };
+};
+
+&qspi1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_qspi1_1>;
+       status = "okay";
+       ddrsmp=<0>;
+
+       flash0: n25q256a@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a";
+               spi-max-frequency = <29000000>;
+               reg = <0>;
+       };
+
+       flash1: n25q256a@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q256a";
+               spi-max-frequency = <29000000>;
+               reg = <1>;
+       };
+};