MLK-12676-2 arm: dts: enable usb otg2 for imx6ull arm2 board

Use a dedicatd dts file to enable both OTG1 and OTG2 ports in OTG mode,
- otg2 ID pin is muxed with SD1 vselect, so move it out of hog and don't
  use it in usdhc1 in usb dts.
- otg2 vbus control use GPIO1_IO09 since the original gpio is shared
  with i2c1(with pmic chip connected).

Signed-off-by: Li Jun <jun.li@nxp.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index d207fdb..96380b5 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -484,7 +484,8 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
        imx6ull-ddr3-arm2-adc.dtb \
        imx6ull-ddr3-arm2-gpmi-weim.dtb \
        imx6ull-ddr3-arm2-lcdif.dtb \
-       imx6ull-ddr3-arm2-uart2.dtb
+       imx6ull-ddr3-arm2-uart2.dtb \
+       imx6ull-ddr3-arm2-usb.dtb
 dtb-$(CONFIG_SOC_IMX7D) += \
        imx7d-cl-som-imx7.dtb \
        imx7d-colibri-eval-v3.dtb \

diff --git a/arch/arm/boot/dts/imx6ull-ddr3-arm2-usb.dts b/arch/arm/boot/dts/imx6ull-ddr3-arm2-usb.dts
new file mode 100644 (file)
index 0000000..ed4f144
--- /dev/null
+++ b/arch/arm/boot/dts/imx6ull-ddr3-arm2-usb.dts
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/* DTS file for validate USB at i.mx6ull ddr3 arm2 board */
+
+#include "imx6ull-ddr3-arm2.dts"
+
+/ {
+       regulators {
+               reg_usb_otg2_vbus: regulator@3 {
+               compatible = "regulator-fixed";
+               reg = <3>;
+               regulator-name = "usb_otg2_vbus";
+               pinctrl-0 = <&pinctrl_usb_otg2>;
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+               };
+       };
+};
+
+&iomuxc {
+       usbotg2 {
+               pinctrl_usb_otg2_id: usbotg2idgrp {
+                       fsl,pins = <
+                               MX6UL_PAD_GPIO1_IO05__ANATOP_OTG2_ID    0x17059
+                       >;
+               };
+
+               pinctrl_usb_otg2: usbotg2grp {
+                       fsl,pins = <
+                               MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x10b0
+                       >;
+               };
+       };
+};
+
+&usbotg2 {
+       vbus-supply = <&reg_usb_otg2_vbus>; /* hardware rework is needed */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usb_otg2_id>;
+       srp-disable;
+       hnp-disable;
+       adp-disable;
+       status = "okay";
+};
+
+&usdhc1 {
+       no-1-8-v;
+       vmmc-supply = <>;
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+};

diff --git a/arch/arm/boot/dts/imx6ull-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ull-ddr3-arm2.dts
index 49691c7..054b0f8 100644 (file)
--- a/arch/arm/boot/dts/imx6ull-ddr3-arm2.dts
+++ b/arch/arm/boot/dts/imx6ull-ddr3-arm2.dts
@@ -394,7 +394,6 @@
                        fsl,pins = <
                                MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059 /* SD1 CD */
                                MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x17059 /* SD1 WP */
-                               MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
                        >;
                };
 
@@ -812,6 +811,12 @@
                        >;
                };
 
+               pinctrl_usdhc1_vselect: usdhc1_vselect_grp {
+                       fsl,pins = <
+                               MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059 /* SD1 VSELECT */
+                       >;
+               };
+
                pinctrl_usdhc2: usdhc2grp {
                        fsl,pins = <
                                MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
@@ -924,9 +929,9 @@
 
 &usdhc1 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_vselect>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_vselect>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_vselect>;
        cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
        wp-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
        keep-power-in-suspend;