ARM: dts: am437x-gp-evm: Add state for ddr3 vtt toggle pin

Add pinctrl data for ddr_vtt_toggle pin so that it is configured
for proper state during DeepSleep0. The pin should enter DS0 off mode
and hold the line low so VTT regulator is kept off while suspended.
It is also important for the PULLUP to be set on this pin so that
on removal of isolation, the VTT line is pulled high as a requirement
for bringing the DDR3 out of self-refresh.

This toggling is dependent on the IO isolation controlled by the
wkup_m3. Without placing the IOs into isolation the DS0 states set for
the pin will not be latched into effect during suspend.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts
index 601bf4d..d119f2a 100644 (file)
--- a/arch/arm/boot/dts/am437x-gp-evm.dts
+++ b/arch/arm/boot/dts/am437x-gp-evm.dts
@@ -162,9 +162,15 @@
 
 &am43xx_pinmux {
        pinctrl-names = "default", "sleep";
-       pinctrl-0 = <&wlan_pins_default>;
+       pinctrl-0 = <&wlan_pins_default &ddr3_vtt_toggle_default>;
        pinctrl-1 = <&wlan_pins_sleep>;
 
+       ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
+               pinctrl-single,pins = <
+                       0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7) /* spi0_cs0.gpio5_7 */
+               >;
+       };
+
        i2c0_pins: i2c0_pins {
                pinctrl-single,pins = <
                        AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */