Enable the imx pcie ep verification solution.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
ranges = <0x81000000 0 0x00000000 0x7ff80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x70000000 0x70000000 0 0x0ff00000>; /* non-prefetchable memory */
num-lanes = <1>;
+ num-viewport = <4>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */
- interrupt-names = "msi";
+ interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic 0 105 4>,
reg = <0 0x80000000 0 0x1000000>;
};
- rpmsg_reserved: rpmsg@0xb8000000 {
- no-map;
- reg = <0 0xb8000000 0 0x400000>;
- };
-
rpmsg_dma_reserved:rpmsg_dma@0xb8400000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x00000000 0x40000000 0 0xc0000000>;
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ rpmsg_reserved: rpmsg@0xb8000000 {
+ no-map;
+ reg = <0 0xb8000000 0 0x400000>;
+ };
+ };
+
modem_reset: modem-reset {
compatible = "gpio-reset";
reset-gpios = <&gpio3 5 GPIO_ACTIVE_LOW>;
<&clk IMX8MQ_CLK_PCIE1_PHY>,
<&pcie0_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ hard-wired = <1>;
status = "okay";
};
<&clk IMX8MQ_CLK_PCIE2_PHY>,
<&pcie1_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ reserved-region = <&rpmsg_reserved>;
status = "okay";
};
0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
num-lanes = <1>;
num-viewport = <4>;
- interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */
+ interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
0x82000000 0 0x20000000 0x20000000 0 0x07f00000>; /* non-prefetchable memory */
num-lanes = <1>;
num-viewport = <4>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */
+ interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
disable-gpio = <&lsio_gpio4 9 GPIO_ACTIVE_LOW>;
ext_osc = <1>;
epdev_on-supply = <&epdev_on>;
+ reserved-region = <&rpmsg_reserved>;
status = "okay";
};
ranges = <0x81000000 0 0x00000000 0x6ff80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x60000000 0x60000000 0 0x0ff00000>; /* non-prefetchable memory */
num-lanes = <1>;
+ num-viewport = <4>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */
- interrupt-names = "msi";
+ interrupt-names = "msi", "dma";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gic 0 73 4>,
disable-gpio = <&pca9557_a 2 GPIO_ACTIVE_LOW>;
reset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;
ext_osc = <1>;
+ reserved-region = <&rpmsg_reserved>;
status = "okay";
};