fsl-imx8qm-mek.dtb \
fsl-imx8qm-mek_ca53.dtb \
fsl-imx8qm-mek_ca72.dtb \
+ fsl-imx8qm-mek-hdmi.dtb \
fsl-imx8qm-mek-it6263.dtb \
fsl-imx8qm-mek-dsi-adv7535.dtb \
fsl-imx8qm-mek-dsi-rm67191.dtb \
--- /dev/null
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+/*
+ * HDMI only dts, disable ldb display.
+ */
+
+#include "fsl-imx8qm-mek.dts"
+
+/ {
+ sound-hdmi {
+ compatible = "fsl,imx-audio-cdnhdmi";
+ model = "imx-audio-hdmi";
+ audio-cpu = <&sai_hdmi_tx>;
+ protocol = <1>;
+ };
+};
+
+&ldb1_phy {
+ status = "disabled";
+};
+
+&ldb1 {
+ status = "disabled";
+};
+
+&i2c1_lvds0 {
+ status = "disabled";
+};
+
+&hdmi {
+ compatible = "fsl,imx8qm-hdmi";
+ status = "okay";
+};
+
+&sai_hdmi_tx {
+ assigned-clocks =<&clk IMX8QM_ACM_HDMI_TX_SAI0_MCLK_SEL>,
+ <&clk IMX8QM_AUD_PLL0_DIV>,
+ <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+ <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>,
+ <&clk IMX8QM_AUD_SAI_HDMITX0_MCLK>;
+ assigned-clock-parents = <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>;
+ assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>;
+ fsl,sai-asynchronous;
+ status = "okay";
+};