arm64: dts: imx8mn: add dispmix reset support in dts for imx8mn

Enable dispmix reset controller function in dts for imx8mn

Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index e70fe73..70e41f6 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/imx8mn-clock.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/reset/imx8mn-dispmix.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/thermal/thermal.h>
 
@@ -935,4 +936,40 @@
                assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_100M>;
                clock-names = "main_clk";
        };
+
+       dispmix-reset {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               dispmix_sft_rstn: dispmix-sft-rstn@32e28000 {
+                       compatible = "fsl,imx8mn-dispmix-sft-rstn";
+                       reg = <0x0 0x32e28000 0x0 0x4>;
+                       clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+                       clock-names = "disp_apb_root_clk";
+                       active_low;
+                       power-domains = <&dispmix_pd>;
+                       #reset-cells = <1>;
+               };
+
+               dispmix_clk_en: dispmix-clk-en@32e28004 {
+                       compatible = "fsl,imx8mn-dispmix-clk-en";
+                       reg = <0x0 0x32e28004 0x0 0x4>;
+                       clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+                       clock-names = "disp_apb_root_clk";
+                       power-domains = <&dispmix_pd>;
+                       #reset-cells = <1>;
+               };
+
+               dispmix_mipi_rst: dispmix-mipi-rst@32e28008 {
+                       compatible = "fsl,imx8mn-dispmix-mipi-rst";
+                       reg = <0x0 0x32e28008 0x0 0x4>;
+                       clocks = <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+                       clock-names = "disp_apb_root_clk";
+                       active_low;
+                       power-domains = <&dispmix_pd>;
+                       #reset-cells = <1>;
+               };
+       };
 };