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pinctrl: aspeed: Format pinconf debug consistent with pinmux
author
Andrew Jeffery
<andrew@aj.id.au>
Thu, 10 Sep 2020 02:56:29 +0000
(12:26 +0930)
committer
Linus Walleij
<linus.walleij@linaro.org>
Tue, 29 Sep 2020 12:38:44 +0000
(14:38 +0200)
When displaying which pinconf register and field is being touched,
format the field mask so that it's consistent with the way the pinmux
portion formats the mask.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link:
https://lore.kernel.org/r/20200910025631.2996342-2-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/aspeed/pinctrl-aspeed.c
patch
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diff --git
a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
index
53f3f8a
..
2e0260c
100644
(file)
--- a/
drivers/pinctrl/aspeed/pinctrl-aspeed.c
+++ b/
drivers/pinctrl/aspeed/pinctrl-aspeed.c
@@
-539,9
+539,9
@@
int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
if (rc < 0)
return rc;
- pr_debug("%s: Set SCU%02X[
%lu]=%d
for param %d(=%d) on pin %d\n",
- __func__, pconf->reg,
__ffs(pconf->mask)
,
-
pmap->
val, param, arg, offset);
+ pr_debug("%s: Set SCU%02X[
0x%08X]=0x%X
for param %d(=%d) on pin %d\n",
+ __func__, pconf->reg,
pconf->mask
,
+ val, param, arg, offset);
}
return 0;