MLK-16839-2: ARM64: dts: add clock source for asrc

add IMX8QM_ACM_AUD_CLK0_SEL and IMX8QM_ACM_AUD_CLK1_SEL for
asrc clock source. There is no clock gate for them, only
clock mux.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index b83c871..d9c143d 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -2866,8 +2866,8 @@
                        <&clk IMX8QM_AUD_ASRC_0_MEM>,
                        <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>,
                        <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>,
-                       <&clk IMX8QM_CLK_DUMMY>,
-                       <&clk IMX8QM_CLK_DUMMY>,
+                       <&clk IMX8QM_ACM_AUD_CLK0_SEL>,
+                       <&clk IMX8QM_ACM_AUD_CLK1_SEL>,
                        <&clk IMX8QM_CLK_DUMMY>,
                        <&clk IMX8QM_CLK_DUMMY>,
                        <&clk IMX8QM_CLK_DUMMY>,
@@ -2906,8 +2906,8 @@
                        <&clk IMX8QM_AUD_ASRC_1_MEM>,
                        <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_CLK>,
                        <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK1_CLK>,
-                       <&clk IMX8QM_CLK_DUMMY>,
-                       <&clk IMX8QM_CLK_DUMMY>,
+                       <&clk IMX8QM_ACM_AUD_CLK0_SEL>,
+                       <&clk IMX8QM_ACM_AUD_CLK1_SEL>,
                        <&clk IMX8QM_CLK_DUMMY>,
                        <&clk IMX8QM_CLK_DUMMY>,
                        <&clk IMX8QM_CLK_DUMMY>,

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
index ae6a16e..1e603c1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
@@ -2018,8 +2018,8 @@
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>,
-                       <&clk IMX8QXP_CLK_DUMMY>,
-                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_ACM_AUD_CLK0_SEL>,
+                       <&clk IMX8QXP_ACM_AUD_CLK1_SEL>,
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_CLK_DUMMY>,
@@ -2058,8 +2058,8 @@
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>,
                        <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK1_CLK>,
-                       <&clk IMX8QXP_CLK_DUMMY>,
-                       <&clk IMX8QXP_CLK_DUMMY>,
+                       <&clk IMX8QXP_ACM_AUD_CLK0_CLK>,
+                       <&clk IMX8QXP_ACM_AUD_CLK1_CLK>,
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_CLK_DUMMY>,
                        <&clk IMX8QXP_CLK_DUMMY>,