LFU-126-7 Layerscape: Enable Job ring driver model in U-Boot.

LS(1012/1028/1043/1046/1088/2088) - added support for JR driver.
LX2160, LX2162 - added support for JR driver.
sec is initialized based on job ring information processed
from device tree.

Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index ae0b7b2..1fa2ac7 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -18,6 +18,10 @@ config ARCH_LS1012A
        select SYS_I2C_MXC
        select SYS_I2C_MXC_I2C1 if !DM_I2C
        select SYS_I2C_MXC_I2C2 if !DM_I2C
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
+       select ARCH_MISC_INIT
        imply PANIC_HANG
 
 config ARCH_LS1028A
@@ -48,6 +52,9 @@ config ARCH_LS1028A
        select SYS_FSL_ERRATUM_A009942 if !TFABOOT
        select SYS_FSL_ERRATUM_A050382
        select RESV_RAM if GIC_V3_ITS
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
        imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -80,6 +87,10 @@ config ARCH_LS1043A
        select SYS_I2C_MXC_I2C2 if !DM_I2C
        select SYS_I2C_MXC_I2C3 if !DM_I2C
        select SYS_I2C_MXC_I2C4 if !DM_I2C
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
+       select ARCH_MISC_INIT
        imply CMD_PCI
 
 config ARCH_LS1046A
@@ -113,6 +124,10 @@ config ARCH_LS1046A
        select SYS_I2C_MXC_I2C2 if !DM_I2C
        select SYS_I2C_MXC_I2C3 if !DM_I2C
        select SYS_I2C_MXC_I2C4 if !DM_I2C
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
+       select ARCH_MISC_INIT
        imply SCSI
        imply SCSI_AHCI
 
@@ -154,6 +169,9 @@ config ARCH_LS1088A
        select SYS_I2C_MXC_I2C3 if !TFABOOT
        select SYS_I2C_MXC_I2C4 if !TFABOOT
        select RESV_RAM if GIC_V3_ITS
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
        imply SCSI
        imply PANIC_HANG
 
@@ -205,6 +223,9 @@ config ARCH_LS2080A
        select SYS_I2C_MXC_I2C3 if !TFABOOT
        select SYS_I2C_MXC_I2C4 if !TFABOOT
        select RESV_RAM if GIC_V3_ITS
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
        imply DISTRO_DEFAULTS
        imply PANIC_HANG
 
@@ -232,6 +253,9 @@ config ARCH_LX2162A
        select BOARD_EARLY_INIT_F
        select SYS_I2C_MXC
        select RESV_RAM if GIC_V3_ITS
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
        imply DISTRO_DEFAULTS
        imply PANIC_HANG
        imply SCSI
@@ -262,6 +286,9 @@ config ARCH_LX2160A
        select BOARD_EARLY_INIT_F
        select SYS_I2C_MXC
        select RESV_RAM if GIC_V3_ITS
+       select FSL_CAAM
+       select FSL_BLOB
+       select MISC
        imply DISTRO_DEFAULTS
        imply PANIC_HANG
        imply SCSI

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 3a5bf77..24a2b75 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -48,6 +48,8 @@
 #endif
 #endif
 #include <linux/mii.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -1649,6 +1651,14 @@ __weak int serdes_misc_init(void)
 
 int arch_misc_init(void)
 {
+       struct udevice *dev;
+
+       uclass_find_first_device(UCLASS_MISC, &dev);
+       for (; dev; uclass_find_next_device(&dev)) {
+               if (device_probe(dev))
+                       continue;
+       }
+
        serdes_misc_init();
 
        return 0;

diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 2894842..7cfb8f1 100644 (file)
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -71,6 +71,50 @@
                        bus-width = <4>;
                };
 
+               crypto: crypto@1700000 {
+                       compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
+                                    "fsl,sec-v4.0";
+                       fsl,sec-era = <8>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x00 0x1700000 0x100000>;
+                       reg = <0x00 0x1700000 0x0 0x100000>;
+                       interrupts = <0 75 0x4>;
+                       dma-coherent;
+
+                       sec_jr0: jr@10000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x10000 0x10000>;
+                               interrupts = <0 71 0x4>;
+                       };
+
+                       sec_jr1: jr@20000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x20000 0x10000>;
+                               interrupts = <0 72 0x4>;
+                       };
+
+                       sec_jr2: jr@30000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x30000 0x10000>;
+                               interrupts = <0 73 0x4>;
+                       };
+
+                       sec_jr3: jr@40000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x40000 0x10000>;
+                               interrupts = <0 74 0x4>;
+                       };
+               };
+
                gpio0: gpio@2300000 {
                        compatible = "fsl,qoriq-gpio";
                        reg = <0x0 0x2300000 0x0 0x10000>;

diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index c7c725a..ad232c1 100644 (file)
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -123,6 +123,45 @@
                       0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
        };
 
+       crypto: crypto@8000000 {
+               compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+               fsl,sec-era = <10>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x00 0x8000000 0x100000>;
+               reg = <0x00 0x8000000 0x0 0x100000>;
+               interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+               dma-coherent;
+
+               sec_jr0: jr@10000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg     = <0x10000 0x10000>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr1: jr@20000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg     = <0x20000 0x10000>;
+                       interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr2: jr@30000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg     = <0x30000 0x10000>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr3: jr@40000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg     = <0x40000 0x10000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+               };
+       };
+
        pcie@1f0000000 {
                compatible = "pci-host-ecam-generic";
                /* ECAM bus 0, HW has more space reserved but not populated */

diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index d8171bd..6218fa6 100644 (file)
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -125,6 +125,49 @@
                        interrupts = <0 43 0x4>;
                };
 
+               crypto: crypto@1700000 {
+                       compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
+                                    "fsl,sec-v4.0";
+                       fsl,sec-era = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x00 0x1700000 0x100000>;
+                       reg = <0x00 0x1700000 0x0 0x100000>;
+                       interrupts = <0 75 0x4>;
+
+                       sec_jr0: jr@10000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x10000 0x10000>;
+                               interrupts = <0 71 0x4>;
+                       };
+
+                       sec_jr1: jr@20000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x20000 0x10000>;
+                               interrupts = <0 72 0x4>;
+                       };
+
+                       sec_jr2: jr@30000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x30000 0x10000>;
+                               interrupts = <0 73 0x4>;
+                       };
+
+                       sec_jr3: jr@40000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x40000 0x10000>;
+                               interrupts = <0 74 0x4>;
+                       };
+               };
+
                i2c0: i2c@2180000 {
                        compatible = "fsl,vf610-i2c";
                        #address-cells = <1>;

diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 9df419a..ffc4082 100644 (file)
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -124,6 +124,49 @@
                        interrupts = <0 43 0x4>;
                };
 
+               crypto: crypto@1700000 {
+                       compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
+                                    "fsl,sec-v4.0";
+                       fsl,sec-era = <8>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x00 0x1700000 0x100000>;
+                       reg = <0x00 0x1700000 0x0 0x100000>;
+                       interrupts = <0 75 0x4>;
+
+                       sec_jr0: jr@10000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x10000 0x10000>;
+                               interrupts = <0 71 0x4>;
+                       };
+
+                       sec_jr1: jr@20000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x20000 0x10000>;
+                               interrupts = <0 72 0x4>;
+                       };
+
+                       sec_jr2: jr@30000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x30000 0x10000>;
+                               interrupts = <0 73 0x4>;
+                       };
+
+                       sec_jr3: jr@40000 {
+                               compatible = "fsl,sec-v5.4-job-ring",
+                                            "fsl,sec-v5.0-job-ring",
+                                            "fsl,sec-v4.0-job-ring";
+                               reg        = <0x40000 0x10000>;
+                               interrupts = <0 74 0x4>;
+                       };
+               };
+
                i2c0: i2c@2180000 {
                        compatible = "fsl,vf610-i2c";
                        #address-cells = <1>;

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 64caa60..5c2d7ee 100644 (file)
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -180,6 +180,45 @@
                dr_mode = "host";
        };
 
+       crypto: crypto@8000000 {
+               compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+               fsl,sec-era = <8>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x00 0x8000000 0x100000>;
+               reg = <0x00 0x8000000 0x0 0x100000>;
+               interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+               dma-coherent;
+
+               sec_jr0: jr@10000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x10000 0x10000>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr1: jr@20000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x20000 0x10000>;
+                       interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr2: jr@30000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x30000 0x10000>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr3: jr@40000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x40000 0x10000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+               };
+       };
+
        pcie1: pcie@3400000 {
                compatible = "fsl,ls-pcie", "snps,dw-pcie";
                reg = <0x00 0x03400000 0x0 0x80000   /* dbi registers */

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 7374d58..aa73927 100644 (file)
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -245,6 +245,45 @@
                        status = "disabled";
        };
 
+       crypto: crypto@8000000 {
+               compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+               fsl,sec-era = <8>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x00 0x8000000 0x100000>;
+               reg = <0x00 0x8000000 0x0 0x100000>;
+               interrupts = <0 139 0x4>;  /* Level high type */
+               dma-coherent;
+
+               sec_jr0: jr@10000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x10000 0x10000>;
+                       interrupts = <0 140 0x4>;  /* Level high type */
+               };
+
+               sec_jr1: jr@20000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x20000 0x10000>;
+                       interrupts = <0 141 0x4>;  /* Level high type */
+               };
+
+               sec_jr2: jr@30000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x30000 0x10000>;
+                       interrupts = <0 142 0x4>;  /* Level high type */
+               };
+
+               sec_jr3: jr@40000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x40000 0x10000>;
+                       interrupts = <0 143 0x4>;  /* Level high type */
+               };
+       };
+
        fsl_mc: fsl-mc@80c000000 {
                compatible = "fsl,qoriq-mc", "simple-mfd";
                reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */

diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index a6f0e9b..1b1ef68 100644 (file)
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -27,6 +27,45 @@
                clock-output-names = "sysclk";
        };
 
+       crypto: crypto@8000000 {
+               compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+               fsl,sec-era = <10>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges = <0x0 0x00 0x8000000 0x100000>;
+               reg = <0x00 0x8000000 0x0 0x100000>;
+               interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+               dma-coherent;
+
+               sec_jr0: jr@10000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x10000 0x10000>;
+                       interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr1: jr@20000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x20000 0x10000>;
+                       interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr2: jr@30000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x30000 0x10000>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               sec_jr3: jr@40000 {
+                       compatible = "fsl,sec-v5.0-job-ring",
+                                    "fsl,sec-v4.0-job-ring";
+                       reg        = <0x40000 0x10000>;
+                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+               };
+       };
+
        clockgen: clocking@1300000 {
                compatible = "fsl,ls2080a-clockgen";
                reg = <0 0x1300000 0 0xa0000>;

diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index cfe3f33..282d9dc 100644 (file)
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -28,7 +28,6 @@
 #include <fsl_mmdc.h>
 #include <spl.h>
 #include <netdev.h>
-#include <fsl_sec.h>
 #include "../common/qixis.h"
 #include "ls1012aqds_qixis.h"
 #include "ls1012aqds_pfe.h"
@@ -153,10 +152,6 @@ int board_init(void)
        gd->env_addr = (ulong)&default_environment[0];
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 41bcf6f..9e452e8 100644 (file)
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -27,7 +27,6 @@
 #include <env_internal.h>
 #include <fsl_mmdc.h>
 #include <netdev.h>
-#include <fsl_sec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -176,10 +175,6 @@ int board_init(void)
        gd->env_addr = (ulong)&default_environment[0];
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index 5269fd3..0edd540 100644 (file)
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -77,10 +77,6 @@ int board_init(void)
        gd->env_addr = (ulong)&default_environment[0];
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index beef26b..b39ff00 100644 (file)
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -20,7 +20,6 @@
 #include <fm_eth.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
-#include <fsl_sec.h>
 #include "cpld.h"
 #ifdef CONFIG_U_QE
 #include <fsl_qe.h>
@@ -211,10 +210,6 @@ int board_init(void)
        out_le32(SMMU_NSCR0, val);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index 2069442..5f9f595 100644 (file)
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -27,7 +27,6 @@
 #include <fsl_csu.h>
 #include <fsl_esdhc.h>
 #include <fsl_ifc.h>
-#include <fsl_sec.h>
 #include <spl.h>
 
 #include "../common/vid.h"
@@ -448,10 +447,6 @@ int board_init(void)
        out_le32(SMMU_NSCR0, val);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
        return 0;
 }
 

diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 93ef903..d8b9071 100644 (file)
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -23,7 +23,6 @@
 #include <fsl_esdhc.h>
 #include <power/mc34vr500_pmic.h>
 #include "cpld.h"
-#include <fsl_sec.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -85,10 +84,6 @@ int board_init(void)
        out_le32(SMMU_NSCR0, val);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index f5dc449..7f119ca 100644 (file)
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -12,7 +12,6 @@
 #include <netdev.h>
 #include <fsl_ifc.h>
 #include <fsl_ddr.h>
-#include <fsl_sec.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
 #include <fdt_support.h>
@@ -839,9 +838,6 @@ int board_init(void)
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR105_IRQ_MASK);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif

diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 3a026b0..c521868 100644 (file)
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -23,7 +23,6 @@
 #include <asm/arch/mmu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/ppa.h>
-#include <fsl_sec.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
 
 #ifdef CONFIG_FSL_QIXIS
@@ -273,9 +272,6 @@ int board_init(void)
        QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET_EN);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
 #ifdef CONFIG_FSL_LS_PPA
        ppa_init();
 #endif
@@ -284,9 +280,6 @@ int board_init(void)
        /* invert AQR405 IRQ pins polarity */
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR405_IRQ_MASK);
 #endif
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
 
 #if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
        pci_init();

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 47a7024..b3da808 100644 (file)
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -14,7 +14,6 @@
 #include <errno.h>
 #include <netdev.h>
 #include <fsl_ddr.h>
-#include <fsl_sec.h>
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <linux/bitops.h>
@@ -618,10 +617,6 @@ int board_init(void)
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR107_IRQ_MASK);
 #endif
 
-#ifdef CONFIG_FSL_CAAM
-       sec_init();
-#endif
-
 #if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
        pci_init();
 #endif

diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 2ee57de..6525956 100644 (file)
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -44,7 +44,6 @@ CONFIG_NETCONSOLE=y
 CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_I2C_DEFAULT_BUS_NUMBER=0

diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index de3db3e..73910cb 100644 (file)
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -35,7 +35,6 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_ADDR=0x60500000
 CONFIG_DM=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y

diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 9d5c941..f5c2ef6 100644 (file)
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -47,7 +47,6 @@ CONFIG_ENV_SPI_BUS=0
 CONFIG_ENV_ADDR=0x40500000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y

diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index 2fbfa34..7d5d63e 100644 (file)
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -38,7 +38,6 @@ CONFIG_ENV_ADDR=0x40500000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y

diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index de57235..f567de6 100644 (file)
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -45,7 +45,6 @@ CONFIG_ENV_ADDR=0x580500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_I2C_DEFAULT_BUS_NUMBER=0

diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index ed6f78b..ca71096 100644 (file)
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -46,7 +46,6 @@ CONFIG_ENV_ADDR=0x20500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_I2C_DEFAULT_BUS_NUMBER=0

diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 1d3b59c..36597e8 100644 (file)
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -45,7 +45,6 @@ CONFIG_ENV_ADDR=0x20500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_I2C_DEFAULT_BUS_NUMBER=0

diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index d0d3384..9666a8b 100644 (file)
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -47,7 +47,6 @@ CONFIG_ENV_ADDR=0x20500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
-CONFIG_FSL_CAAM=y
 CONFIG_MPC8XXX_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y