MLK-15008-2 ARM64: dts: freescale: imx8qm: update cpu-freq opp table

Update i.MX8QM cpu-freq opp table according to SCFW setting,
and move the cpu-freq opp table to soc dtsi instead of board
dtb, as it is SoC feature.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
index 86a65e1..17ae620 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
@@ -470,22 +470,6 @@
        status = "okay";
 };
 
-&A53_0 {
-       operating-points = <
-               /* kHz    uV */
-               1296000 1150000
-       >;
-       clocks = <&clk IMX8QM_A53_DIV>;
-};
-
-&A72_0 {
-       operating-points = <
-               /* kHz    uV */
-               1800000 1150000
-       >;
-       clocks = <&clk IMX8QM_A72_DIV>;
-};
-
 &gpu_3d0 {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
index 46573ec..f980fb2 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
@@ -1635,3 +1635,19 @@
                status = "disabled";
        };
 };
+
+&A53_0 {
+       operating-points = <
+               /* kHz    uV */
+               1200000 1150000
+       >;
+       clocks = <&clk IMX8QM_A53_DIV>;
+};
+
+&A72_0 {
+       operating-points = <
+               /* kHz    uV */
+               1584000 1150000
+       >;
+       clocks = <&clk IMX8QM_A72_DIV>;
+};