MLK-18680-2: drm: imx: dcss: add some traces

This patch will add traces for the following events:
 * CTXLD arm, completion and kick;
 * VBLANKs;
 * atomic flushes;
 * plane updates (printing the DPR buffer base address);

These will allow us to measure and analyze where bottlenecks are:
application or driver.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>

diff --git a/drivers/gpu/drm/imx/dcss/dcss-crtc.c b/drivers/gpu/drm/imx/dcss/dcss-crtc.c
index 49ba9a1..5e9366a 100644 (file)
--- a/drivers/gpu/drm/imx/dcss/dcss-crtc.c
+++ b/drivers/gpu/drm/imx/dcss/dcss-crtc.c
@@ -28,6 +28,9 @@
 #include "imx-drm.h"
 #include "dcss-crtc.h"
 
+#define TRACE_FLUSH    0
+#define TRACE_VBLANK   1
+
 struct dcss_crtc {
        struct device *dev;
        struct drm_crtc         base;
@@ -155,6 +158,8 @@ static void dcss_crtc_atomic_flush(struct drm_crtc *crtc,
                                                   base);
        struct dcss_soc *dcss = dev_get_drvdata(dcss_crtc->dev->parent);
 
+       dcss_trace_module(TRACE_DRM_CRTC, TRACE_FLUSH);
+
        if (dcss_dtg_is_enabled(dcss))
                dcss_ctxld_enable(dcss);
 }
@@ -286,6 +291,8 @@ static irqreturn_t dcss_crtc_irq_handler(int irq, void *dev_id)
        struct dcss_crtc *dcss_crtc = dev_id;
        struct dcss_soc *dcss = dev_get_drvdata(dcss_crtc->dev->parent);
 
+       dcss_trace_module(TRACE_DRM_CRTC, TRACE_VBLANK);
+
        if (dcss_ctxld_is_flushed(dcss))
                drm_crtc_handle_vblank(&dcss_crtc->base);
 

diff --git a/drivers/gpu/imx/dcss/dcss-ctxld.c b/drivers/gpu/imx/dcss/dcss-ctxld.c
index c41c758..41f944e 100644 (file)
--- a/drivers/gpu/imx/dcss/dcss-ctxld.c
+++ b/drivers/gpu/imx/dcss/dcss-ctxld.c
@@ -66,6 +66,10 @@
 #define CTXLD_SB_CTX_ENTRIES           (CTXLD_SB_LP_CTX_ENTRIES + \
                                         CTXLD_SB_HP_CTX_ENTRIES)
 
+#define TRACE_ARM                      (1LL << 48)
+#define TRACE_IRQ                      (2LL << 48)
+#define TRACE_KICK                     (3LL << 48)
+
 static struct dcss_debug_reg ctxld_debug_reg[] = {
        DCSS_DBG_REG(DCSS_CTXLD_CONTROL_STATUS),
        DCSS_DBG_REG(DCSS_CTXLD_DB_BASE_ADDR),
@@ -142,6 +146,8 @@ static irqreturn_t dcss_ctxld_irq_handler(int irq, void *data)
            !(irq_status & CTXLD_ENABLE) && priv->in_use) {
                priv->in_use = false;
 
+               dcss_trace_module(TRACE_CTXLD,
+                                 TRACE_IRQ | (priv->current_ctx ^ 1));
 
                if (priv->dcss->dcss_disable_callback) {
                        struct dcss_dtg_priv *dtg = priv->dcss->dtg_priv;
@@ -326,6 +332,10 @@ static int __dcss_ctxld_enable(struct dcss_ctxld_priv *ctxld)
        dcss_writel(sb_base, ctxld->ctxld_reg + DCSS_CTXLD_SB_BASE_ADDR);
        dcss_writel(sb_count, ctxld->ctxld_reg + DCSS_CTXLD_SB_COUNT);
 
+       dcss_trace_module(TRACE_CTXLD,
+                         TRACE_ARM | db_cnt | (sb_count << 16) |
+                         ((u64)ctxld->current_ctx << 32));
+
        /* enable the context loader */
        dcss_set(CTXLD_ENABLE, ctxld->ctxld_reg + DCSS_CTXLD_CONTROL_STATUS);
 
@@ -370,6 +380,8 @@ void dcss_ctxld_kick(struct dcss_soc *dcss)
        struct dcss_ctxld_priv *ctxld = dcss->ctxld_priv;
        unsigned long flags;
 
+       dcss_trace_module(TRACE_CTXLD, TRACE_KICK);
+
        spin_lock_irqsave(&ctxld->lock, flags);
        if (ctxld->armed) {
                ctxld->armed = false;

diff --git a/drivers/gpu/imx/dcss/dcss-dpr.c b/drivers/gpu/imx/dcss/dcss-dpr.c
index 3b7a565..19d9529 100644 (file)
--- a/drivers/gpu/imx/dcss/dcss-dpr.c
+++ b/drivers/gpu/imx/dcss/dcss-dpr.c
@@ -312,6 +312,8 @@ void dcss_dpr_addr_set(struct dcss_soc *dcss, int ch_num, u32 luma_base_addr,
 {
        struct dcss_dpr_ch *ch = &dcss->dpr_priv->ch[ch_num];
 
+       dcss_trace_module(TRACE_DPR, ((u64)ch_num << 32) | luma_base_addr);
+
        if (ch->use_dtrc) {
                luma_base_addr = 0x0;
                chroma_base_addr = 0x10000000;