MLK-11343-03 ARM: dts: imx: add clocks in cpu mode

Add pll1, pll1_bypass and pll1_bypass_src clock
reference define in dts file.

Signed-off-by: Bai Ping <b51503@freescale.com>

diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index e88fd10..46ffb38 100644 (file)
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -43,9 +43,13 @@
                                 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
                                 <&clks IMX6QDL_CLK_STEP>,
                                 <&clks IMX6QDL_CLK_PLL1_SW>,
-                                <&clks IMX6QDL_CLK_PLL1_SYS>;
+                                <&clks IMX6QDL_CLK_PLL1_SYS>,
+                                <&clks IMX6QDL_CLK_PLL1>,
+                                <&clks IMX6QDL_PLL1_BYPASS>,
+                                <&clks IMX6QDL_PLL1_BYPASS_SRC>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
-                                     "pll1_sw", "pll1_sys";
+                                     "pll1_sw", "pll1_sys", "pll1",
+                                     "pll1_bypass", "Pll1_bypass_src";
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 87506d8..1eed65c 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -48,9 +48,13 @@
                                 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
                                 <&clks IMX6QDL_CLK_STEP>,
                                 <&clks IMX6QDL_CLK_PLL1_SW>,
-                                <&clks IMX6QDL_CLK_PLL1_SYS>;
+                                <&clks IMX6QDL_CLK_PLL1_SYS>,
+                                <&clks IMX6QDL_CLK_PLL1>,
+                                <&clks IMX6QDL_PLL1_BYPASS>,
+                                <&clks IMX6QDL_PLL1_BYPASS_SRC>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
-                                     "pll1_sw", "pll1_sys";
+                                     "pll1_sw", "pll1_sys", "pll1",
+                                     "pll1_bypass", "pll1_bypass_src";
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 153ec8b..234bdb5 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -55,11 +55,17 @@
                                396000          1175000
                        >;
                        clock-latency = <61036>; /* two CLK32 periods */
-                       clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
-                                       <&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
-                                       <&clks IMX6SL_CLK_PLL1_SYS>;
+                       clocks = <&clks IMX6SL_CLK_ARM>,
+                                <&clks IMX6SL_CLK_PLL2_PFD2>,
+                                <&clks IMX6SL_CLK_STEP>,
+                                <&clks IMX6SL_CLK_PLL1_SW>,
+                                <&clks IMX6SL_CLK_PLL1_SYS>,
+                                <&clks IMX6SL_CLK_PLL1>,
+                                <&clks IMX6SL_PLL1_BYPASS>,
+                                <&clks IMX6SL_PLL1_BYPASS_SRC>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
-                                     "pll1_sw", "pll1_sys";
+                                     "pll1_sw", "pll1_sys", "pll1", "pll1_bypass",
+                                     "pll1_bypass_src";
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;

diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 6e7dc28..9523919 100644 (file)
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -77,9 +77,13 @@
                                 <&clks IMX6SX_CLK_PLL2_PFD2>,
                                 <&clks IMX6SX_CLK_STEP>,
                                 <&clks IMX6SX_CLK_PLL1_SW>,
-                                <&clks IMX6SX_CLK_PLL1_SYS>;
+                                <&clks IMX6SX_CLK_PLL1_SYS>,
+                                <&clks IMX6SX_CLK_PLL1>,
+                                <&clks IMX6SX_PLL7_BYPASS>,
+                                <&clks IMX6SX_PLL7_BYPASS_SRC>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
-                                     "pll1_sw", "pll1_sys";
+                                     "pll1_sw", "pll1_sys", "pll1",
+                                     "pll1_bypass", "pll1_bypass_src";
                        arm-supply = <&reg_arm>;
                        soc-supply = <&reg_soc>;
                };