drm/vc4: crtc: Move the cob allocation outside of bind

The COB allocation depends on the HVS channel used for a given
pixelvalve.

While the channel allocation was entirely static in vc4, vc5 changes
that and at bind time, a pixelvalve can be assigned to multiple
HVS channels.

Let's prepare that rework by allocating the COB when it's actually
needed.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Tested-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/484cbd4b00cfeee425295df438222258cc39a3dd.1599120059.git-series.maxime@cerno.tech

diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c
index 9faae22..fdecaba 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_crtc.c
+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
@@ -65,6 +65,20 @@ static const struct debugfs_reg32 crtc_regs[] = {
        VC4_REG32(PV_HACT_ACT),
 };
 
+static unsigned int
+vc4_crtc_get_cob_allocation(struct vc4_dev *vc4, unsigned int channel)
+{
+       u32 dispbase = HVS_READ(SCALER_DISPBASEX(channel));
+       /* Top/base are supposed to be 4-pixel aligned, but the
+        * Raspberry Pi firmware fills the low bits (which are
+        * presumably ignored).
+        */
+       u32 top = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_TOP) & ~3;
+       u32 base = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_BASE) & ~3;
+
+       return top - base + 4;
+}
+
 static bool vc4_crtc_get_scanout_position(struct drm_crtc *crtc,
                                          bool in_vblank_irq,
                                          int *vpos, int *hpos,
@@ -74,6 +88,7 @@ static bool vc4_crtc_get_scanout_position(struct drm_crtc *crtc,
        struct drm_device *dev = crtc->dev;
        struct vc4_dev *vc4 = to_vc4_dev(dev);
        struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
+       unsigned int cob_size;
        u32 val;
        int fifo_lines;
        int vblank_lines;
@@ -109,8 +124,9 @@ static bool vc4_crtc_get_scanout_position(struct drm_crtc *crtc,
                        *hpos += mode->crtc_htotal / 2;
        }
 
+       cob_size = vc4_crtc_get_cob_allocation(vc4, vc4_crtc->channel);
        /* This is the offset we need for translating hvs -> pv scanout pos. */
-       fifo_lines = vc4_crtc->cob_size / mode->crtc_hdisplay;
+       fifo_lines = cob_size / mode->crtc_hdisplay;
 
        if (fifo_lines > 0)
                ret = true;
@@ -823,22 +839,6 @@ static void vc4_set_crtc_possible_masks(struct drm_device *drm,
        }
 }
 
-static void
-vc4_crtc_get_cob_allocation(struct vc4_crtc *vc4_crtc)
-{
-       struct drm_device *drm = vc4_crtc->base.dev;
-       struct vc4_dev *vc4 = to_vc4_dev(drm);
-       u32 dispbase = HVS_READ(SCALER_DISPBASEX(vc4_crtc->channel));
-       /* Top/base are supposed to be 4-pixel aligned, but the
-        * Raspberry Pi firmware fills the low bits (which are
-        * presumably ignored).
-        */
-       u32 top = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_TOP) & ~3;
-       u32 base = VC4_GET_FIELD(dispbase, SCALER_DISPBASEX_BASE) & ~3;
-
-       vc4_crtc->cob_size = top - base + 4;
-}
-
 int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
                  const struct drm_crtc_funcs *crtc_funcs,
                  const struct drm_crtc_helper_funcs *crtc_helper_funcs)
@@ -870,7 +870,6 @@ int vc4_crtc_init(struct drm_device *drm, struct vc4_crtc *vc4_crtc,
         * implemented as private driver state in vc4_kms, not here.
         */
        drm_crtc_enable_color_mgmt(crtc, 0, true, crtc->gamma_size);
-       vc4_crtc_get_cob_allocation(vc4_crtc);
 
        for (i = 0; i < crtc->gamma_size; i++) {
                vc4_crtc->lut_r[i] = i;

diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h
index 0bc150d..d80fc3b 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -477,8 +477,6 @@ struct vc4_crtc {
        u8 lut_r[256];
        u8 lut_g[256];
        u8 lut_b[256];
-       /* Size in pixels of the COB memory allocated to this CRTC. */
-       u32 cob_size;
 
        struct drm_pending_vblank_event *event;