MLK-14326-9 mx6sxsabreauto: Update board file and build configuration

Enable FEC, USB and QSPI DM driver in build configuration and update
board file for them.

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
index 962c333..311e457 100644 (file)
--- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
+++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
@@ -131,8 +131,6 @@ int board_eth_init(bd_t *bis)
        else
                imx_iomux_v3_setup_multiple_pads(fec2_pads, ARRAY_SIZE(fec2_pads));
 
-       setup_fec(CONFIG_FEC_ENET_DEV);
-
        ret = fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
                CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
        if (ret)
@@ -391,6 +389,7 @@ size_t display_count = ARRAY_SIZE(displays);
 
 #ifdef CONFIG_FSL_QSPI
 
+#ifndef CONFIG_DM_SPI
 #define QSPI_PAD_CTRL1 \
        (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_HIGH | \
         PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_40ohm)
@@ -409,13 +408,15 @@ static iomux_v3_cfg_t const quadspi_pads[] = {
        MX6_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2  | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
        MX6_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3  | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
 };
+#endif
 
 int board_qspi_init(void)
 {
+#ifndef CONFIG_DM_SPI
        /* Set the iomux */
        imx_iomux_v3_setup_multiple_pads(quadspi_pads,
                                         ARRAY_SIZE(quadspi_pads));
-
+#endif
        /* Set the clock */
        enable_qspi_clk(0);
 
@@ -503,6 +504,11 @@ int board_init(void)
        setup_gpmi_nand();
 #endif
 
+       /* Also used for OF_CONTROL enabled */
+#ifdef CONFIG_FEC_MXC
+       setup_fec(CONFIG_FEC_ENET_DEV);
+#endif
+
        return 0;
 }
 

diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 91a2e67..8da39f7 100644 (file)
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -33,6 +33,8 @@ CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -44,6 +46,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y

diff --git a/configs/mx6sxsabreauto_nand_defconfig b/configs/mx6sxsabreauto_nand_defconfig
index e093787..098788b 100644 (file)
--- a/configs/mx6sxsabreauto_nand_defconfig
+++ b/configs/mx6sxsabreauto_nand_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -45,6 +47,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y

diff --git a/configs/mx6sxsabreauto_plugin_defconfig b/configs/mx6sxsabreauto_plugin_defconfig
index 6d90a3f..2cd8080 100644 (file)
--- a/configs/mx6sxsabreauto_plugin_defconfig
+++ b/configs/mx6sxsabreauto_plugin_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -45,6 +47,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y

diff --git a/configs/mx6sxsabreauto_qspi1_defconfig b/configs/mx6sxsabreauto_qspi1_defconfig
index eea563b..66ff915 100644 (file)
--- a/configs/mx6sxsabreauto_qspi1_defconfig
+++ b/configs/mx6sxsabreauto_qspi1_defconfig
@@ -34,6 +34,8 @@ CONFIG_DM_PCA953X=y
 CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_STMICRO=y
@@ -45,6 +47,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_PFUZE100=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y
 CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y

diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 5272ad6..eee89be 100644 (file)
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -26,13 +26,23 @@
 #endif
 
 #ifdef CONFIG_IMX_BOOTAUX
-#define CONFIG_SYS_AUXCORE_BOOTDATA 0x62000000 /* Set to QSPI1 B flash at default */
+
+/* Set to QSPI1 B flash at default */
+#ifdef CONFIG_DM_SPI
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x68000000
+#define SF_QSPI1_B_CS_NUM 2
+#else
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x62000000
+#define SF_QSPI1_B_CS_NUM 1
+#endif
+
 
 #define UPDATE_M4_ENV \
        "m4image=m4_qspi.bin\0" \
+       "m4_qspi_cs="__stringify(SF_QSPI1_B_CS_NUM)"\0" \
        "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
        "update_m4_from_sd=" \
-               "if sf probe 1:0; then " \
+               "if sf probe 0:${m4_qspi_cs}; then " \
                        "if run loadm4image; then " \
                                "setexpr fw_sz ${filesize} + 0xffff; " \
                                "setexpr fw_sz ${fw_sz} / 0x10000; "    \
@@ -41,7 +51,7 @@
                                "sf write ${loadaddr} 0x0 ${filesize}; " \
                        "fi; " \
                "fi\0" \
-       "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
+       "m4boot=sf probe 0:${m4_qspi_cs}; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
 #else
 #define UPDATE_M4_ENV ""
 #endif
@@ -222,17 +232,19 @@
 
 #if (CONFIG_FEC_ENET_DEV == 0)
 #define IMX_FEC_BASE                   ENET_BASE_ADDR
-#define CONFIG_FEC_MXC_PHYADDR          0x0
+#define CONFIG_FEC_MXC_PHYADDR          0x1
+#define CONFIG_ETHPRIME                 "FEC0"
 #elif (CONFIG_FEC_ENET_DEV == 1)
 #define IMX_FEC_BASE                   ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR          0x0
+#define CONFIG_ETHPRIME                 "FEC1"
 #endif
 
 #define CONFIG_FEC_XCV_TYPE             RGMII
-#define CONFIG_ETHPRIME                 "FEC"
 
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
+#define CONFIG_FEC_MXC_MDIO_BASE       ENET_BASE_ADDR
 
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_EHCI
@@ -274,9 +286,10 @@
 #define CONFIG_ENV_SIZE                        CONFIG_ENV_SECT_SIZE
 #endif
 
-
+#ifndef CONFIG_DM_PCA953X
 #define CONFIG_PCA953X
 #define CONFIG_SYS_I2C_PCA953X_WIDTH   { {0x30, 8}, {0x32, 8}, {0x34, 8} }
+#endif
 
 #define CONFIG_CMD_BMODE