interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
};
+
+ vpu_g1: vpu_g1@38300000 {
+ compatible = "nxp,imx8mm-hantro","nxp,imx8mp-hantro";
+ reg = <0x0 0x38300000 0x0 0x100000>;
+ reg-names = "regs_hantro";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_hantro";
+ clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>;
+ clock-names = "clk_hantro", "clk_hantro_bus";
+ assigned-clocks = <&clk IMX8MP_CLK_VPU_G1>, <&clk IMX8MP_CLK_VPU_BUS>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL3_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>;
+ assigned-clock-rates = <600000000>, <600000000>;
+ status = "disabled";
+ };
+
+ vpu_g2: vpu_g2@38310000 {
+ compatible = "nxp,imx8mm-hantro","nxp,imx8mp-hantro";
+ reg = <0x0 0x38310000 0x0 0x100000>;
+ reg-names = "regs_hantro";
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_hantro";
+ clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>;
+ clock-names = "clk_hantro", "clk_hantro_bus";
+ assigned-clocks = <&clk IMX8MP_CLK_VPU_G2>, <&clk IMX8MP_CLK_VPU_BUS>;
+ assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>;
+ assigned-clock-rates = <400000000>, <600000000>;
+ status = "disabled";
+ };
+
+ vpu_vc8000e: vpu_vc8000e@38320000 {
+ compatible = "nxp,imx8mp-hantro-vc8000e";
+ reg = <0x0 0x38320000 0x0 0x10000>;
+ reg-names = "regs_hantro_vc8000e";
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "irq_hantro_vc8000e";
+ clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>, <&clk IMX8MP_CLK_VPU_ROOT>;
+ clock-names = "clk_hantro_vc8000e", "clk_hantro_vc8000e_bus";
+ assigned-clocks = <&clk IMX8MP_CLK_VPU_VC8000E>,<&clk IMX8MP_CLK_VPU_BUS>;
+ assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>, <&clk IMX8MP_SYS_PLL3_OUT>;
+ assigned-clock-rates = <400000000>, <600000000>;
+ status = "disabled";
+ };
};