qsfp: move QSFP detection mechanism in board_init

In the case we are running with DM_ETH, the board_eth_init() function is
not called, thus the QSFP detection mechanism is not called.
Move this portion of the code from board_eth_init() into a separate
function which will be called from board_init(), thus ensuring that we
properly detect the medium side of the QSFP.
Also, the function call is now also under a LX2160ARDB ifdef since we
only need this mechanism on this specific board.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>

diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c b/board/freescale/lx2160a/eth_lx2160ardb.c
index 6e7b7c4..4604413 100644 (file)
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -21,23 +21,9 @@
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
 #include "lx2160a.h"
-#include "../common/qsfp_eeprom.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
-#define CS4223_CONFIG_ENV      "cs4223_autoconfig"
-#define CS4223_CONFIG_CR4      "copper"
-#define CS4223_CONFIG_SR4      "optical"
-
-enum qsfp_compat_codes {
-       QSFP_COMPAT_XLPPI = 0x01,
-       QSFP_COMPAT_LR4 = 0x02,
-       QSFP_COMPAT_SR4 = 0x04,
-       QSFP_COMPAT_CR4 = 0x08,
-};
-#endif /* CONFIG_QSFP_EEPROM && CONFIG_PHY_CORTINA */
-
 static bool get_inphi_phy_id(struct mii_dev *bus, int addr, int devad)
 {
        int phy_reg;
@@ -64,9 +50,6 @@ int board_eth_init(struct bd_info *bis)
        struct mii_dev *dev;
        struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
        u32 srds_s1;
-#if defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
-       u8 qsfp_compat_code;
-#endif
 
        srds_s1 = in_le32(&gur->rcwsr[28]) &
                                FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
@@ -171,26 +154,6 @@ int board_eth_init(struct bd_info *bis)
        }
 
 next:
-#if defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
-       /* read qsfp+ eeprom & update environment for cs4223 init */
-       select_i2c_ch_pca9547(I2C_MUX_CH_SEC);
-       select_i2c_ch_pca9547_sec(I2C_MUX_CH_QSFP);
-       qsfp_compat_code = get_qsfp_compat0();
-       switch (qsfp_compat_code) {
-       case QSFP_COMPAT_CR4:
-               env_set(CS4223_CONFIG_ENV, CS4223_CONFIG_CR4);
-               break;
-       case QSFP_COMPAT_XLPPI:
-       case QSFP_COMPAT_SR4:
-               env_set(CS4223_CONFIG_ENV, CS4223_CONFIG_SR4);
-               break;
-       default:
-               /* do nothing if detection fails or not supported*/
-               break;
-       }
-       select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
-#endif /* CONFIG_QSFP_EEPROM & CONFIG_PHY_CORTINA */
-
        cpu_eth_init(bis);
 #endif /* CONFIG_FSL_MC_ENET */
 

diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 4cddfcc..29a2a32 100644 (file)
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -34,6 +34,7 @@
 #include <fsl_immap.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
 #include "lx2160a.h"
+#include "../common/qsfp_eeprom.h"
 
 #ifdef CONFIG_EMC2305
 #include "../common/emc2305.h"
@@ -623,6 +624,32 @@ unsigned long get_board_ddr_clk(void)
 #endif
 }
 
+#if defined(CONFIG_TARGET_LX2160ARDB) && defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
+void qsfp_cortina_detect(void)
+{
+       u8 qsfp_compat_code;
+
+       /* read qsfp+ eeprom & update environment for cs4223 init */
+       select_i2c_ch_pca9547(I2C_MUX_CH_SEC);
+       select_i2c_ch_pca9547_sec(I2C_MUX_CH_QSFP);
+       qsfp_compat_code = get_qsfp_compat0();
+       switch (qsfp_compat_code) {
+       case QSFP_COMPAT_CR4:
+               env_set(CS4223_CONFIG_ENV, CS4223_CONFIG_CR4);
+               break;
+       case QSFP_COMPAT_XLPPI:
+       case QSFP_COMPAT_SR4:
+               env_set(CS4223_CONFIG_ENV, CS4223_CONFIG_SR4);
+               break;
+       default:
+               /* do nothing if detection fails or not supported*/
+               break;
+       }
+       select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+}
+
+#endif /* CONFIG_QSFP_EEPROM & CONFIG_PHY_CORTINA */
+
 int board_init(void)
 {
 #if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB)
@@ -637,6 +664,10 @@ int board_init(void)
 #if defined(CONFIG_FSL_MC_ENET) && defined(CONFIG_TARGET_LX2160ARDB)
        /* invert AQR107 IRQ pins polarity */
        out_le32(irq_ccsr + IRQCR_OFFSET / 4, AQR107_IRQ_MASK);
+
+#if defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
+       qsfp_cortina_detect();
+#endif
 #endif
 
 #ifdef CONFIG_FSL_CAAM

diff --git a/board/freescale/lx2160a/lx2160a.h b/board/freescale/lx2160a/lx2160a.h
index 52b0207..5b0ab95 100644 (file)
--- a/board/freescale/lx2160a/lx2160a.h
+++ b/board/freescale/lx2160a/lx2160a.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
  */
 
 #ifndef __LX2160_H
@@ -58,4 +58,17 @@
 #endif
 #endif
 
+#if defined(CONFIG_QSFP_EEPROM) && defined(CONFIG_PHY_CORTINA)
+#define CS4223_CONFIG_ENV      "cs4223_autoconfig"
+#define CS4223_CONFIG_CR4      "copper"
+#define CS4223_CONFIG_SR4      "optical"
+
+enum qsfp_compat_codes {
+       QSFP_COMPAT_XLPPI = 0x01,
+       QSFP_COMPAT_LR4 = 0x02,
+       QSFP_COMPAT_SR4 = 0x04,
+       QSFP_COMPAT_CR4 = 0x08,
+};
+#endif /* CONFIG_QSFP_EEPROM && CONFIG_PHY_CORTINA */
+
 #endif /* __LX2160_H */