MLK-11268-1 ARM: imx: disconnect vddhigh and vddsnvs in dsm for imx6sx

per design team's recommendation, in DSM mode,
need to disconnect vddhigh and vddsnvs, add it for i.MX6SX.

i.MX6SX has different bit definition than i.MX6SL about this
bit in PMU_MISC0 register.

Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit ec42012c66961c357a1ed4c31d27f83a1db86611)

diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 735749e..9a1a1c3 100644 (file)
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -45,6 +45,8 @@
 #define BM_ANADIG_ANA_MISC0_V3_STOP_MODE_CONFIG        0xc00
 /* Below MISC0_DISCON_HIGH_SNVS is only for i.MX6SL */
 #define BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS   0x2000
+/* i.MX6SX DISCON_HIGH_SNVS is changed to bit 12 */
+#define BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS        0x1000
 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B   0x80000
 #define BM_ANADIG_USB_CHRG_DETECT_EN_B         0x100000
 
@@ -83,8 +85,14 @@ static inline void imx_anatop_enable_2p5_pulldown(bool enable)
 
 static inline void imx_anatop_disconnect_high_snvs(bool enable)
 {
-       regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR),
-               BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS);
+       if (cpu_is_imx6sx())
+               regmap_write(anatop, ANADIG_ANA_MISC0 +
+                       (enable ? REG_SET : REG_CLR),
+                       BM_ANADIG_ANA_MISC0_V2_DISCON_HIGH_SNVS);
+       else
+               regmap_write(anatop, ANADIG_ANA_MISC0 +
+                       (enable ? REG_SET : REG_CLR),
+                       BM_ANADIG_ANA_MISC0_DISCON_HIGH_SNVS);
 }
 
 void imx_anatop_pre_suspend(void)
@@ -107,7 +115,7 @@ void imx_anatop_pre_suspend(void)
 
        imx_anatop_enable_fet_odrive(true);
 
-       if (cpu_is_imx6sl())
+       if (cpu_is_imx6sl() || cpu_is_imx6sx())
                imx_anatop_disconnect_high_snvs(true);
 }
 
@@ -131,7 +139,7 @@ void imx_anatop_post_resume(void)
 
        imx_anatop_enable_fet_odrive(false);
 
-       if (cpu_is_imx6sl())
+       if (cpu_is_imx6sl() || cpu_is_imx6sx())
                imx_anatop_disconnect_high_snvs(false);
 
 }