MLK-21840-1 DTS: imx8qm_mek: Update DTS files for QM MEK board
authorYe Li <ye.li@nxp.com>
Tue, 17 Mar 2020 06:43:05 +0000 (23:43 -0700)
committerYe Li <ye.li@nxp.com>
Thu, 29 Apr 2021 07:56:20 +0000 (00:56 -0700)
Update DTS files for iMX8QM MEK board. Porting them from imx_v2019.04
u-boot

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 86bc4e6d33902347dacc2554e7f348a06430783b)

arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi
arch/arm/dts/fsl-imx8qm-mek.dts

index 9e0d264..05dd992 100644 (file)
@@ -3,6 +3,20 @@
  * Copyright 2018 NXP
  */
 
+/ {
+
+       aliases {
+               usbhost1 = &usbh3;
+       };
+
+       usbh3: usbh3 {
+               compatible = "Cadence,usb3-host";
+               dr_mode = "host";
+               cdns3,usb = <&usbotg3>;
+               status = "okay";
+       };
+};
+
 &{/imx8qm-pm} {
 
        u-boot,dm-spl;
        u-boot,dm-spl;
 };
 
+&{/regulators} {
+       u-boot,dm-spl;
+};
+
+&reg_usdhc2_vmmc {
+       u-boot,dm-spl;
+};
+
+&{/mu@5d1c0000/iomuxc/imx8qm-mek} {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2_gpio {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_lpuart0 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_usdhc1 {
+       u-boot,dm-spl;
+};
+
+&pinctrl_flexspi0 {
+       u-boot,dm-spl;
+};
+
 &pd_lsio {
        u-boot,dm-spl;
 };
        u-boot,dm-spl;
 };
 
+&pd_lsio_flexspi0 {
+       u-boot,dm-spl;
+};
+
 &pd_conn {
        u-boot,dm-spl;
 };
        u-boot,dm-spl;
 };
 
+&pd_conn_usb2 {
+       u-boot,dm-spl;
+};
+
+&pd_conn_usb2_phy {
+       u-boot,dm-spl;
+};
+
 &gpio0 {
        u-boot,dm-spl;
 };
        u-boot,dm-spl;
 };
 
+&usbotg3 {
+       phys = <&usbphynop1>;
+       u-boot,dm-spl;
+};
+
+&usbphynop1 {
+       compatible = "cdns,usb3-phy";
+       reg = <0x0 0x5B160000 0x0 0x40000>;
+       #phy-cells = <0>;
+       u-boot,dm-spl;
+};
+
 &usdhc1 {
        u-boot,dm-spl;
        mmc-hs400-1_8v;
        sd-uhs-sdr104;
        sd-uhs-ddr50;
 };
+
+&flexspi0 {
+       u-boot,dm-spl;
+};
+
+&flash0 {
+       u-boot,dm-spl;
+};
+
+&wu {
+       u-boot,dm-spl;
+};
+
+&fec1 {
+       phy-mode = "rgmii-id";
+};
+
+&fec2 {
+       phy-mode = "rgmii-id";
+};
+
+&ethphy0 {
+       vddio0: vddio-regulator {
+               regulator-name = "VDDIO";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+       };
+};
+
+&ethphy1 {
+       vddio1: vddio-regulator {
+               regulator-name = "VDDIO";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+       };
+};
\ No newline at end of file
index 63908ba..47e9711 100644 (file)
@@ -6,25 +6,44 @@
 /dts-v1/;
 
 #include "fsl-imx8qm.dtsi"
-#include "fsl-imx8qm-mek-u-boot.dtsi"
 
 / {
-       model = "Freescale i.MX8QM MEK";
+       model = "NXP i.MX8QM MEK";
        compatible = "fsl,imx8qm-mek", "fsl,imx8qm";
 
+       aliases {
+               gpio8 = &max7322;
+       };
+
        chosen {
-               bootargs = "console=ttyLP0,115200 earlycon=lpuart32,0x5a060000,115200";
+               bootargs = "console=ttyLP0,115200 earlycon";
                stdout-path = &lpuart0;
        };
 
-       reg_usdhc2_vmmc: usdhc2_vmmc {
-               compatible = "regulator-fixed";
-               regulator-name = "sw-3p3-sd1";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
-               off-on-delay = <4800>;
-               enable-active-high;
+       regulators {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               reg_usb_otg1_vbus: regulator@0 {
+                       compatible = "regulator-fixed";
+                       reg = <0>;
+                       regulator-name = "usb_otg1_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+                       enable-active-high;
+               };
+
+               reg_usdhc2_vmmc: usdhc2_vmmc {
+                       compatible = "regulator-fixed";
+                       regulator-name = "sw-3p3-sd1";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       gpio = <&gpio4 7 GPIO_ACTIVE_HIGH>;
+                       off-on-delay-us = <4800>;
+                       enable-active-high;
+               };
        };
 };
 
        imx8qm-mek {
                pinctrl_hog: hoggrp {
                        fsl,pins = <
-                               SC_P_MCLK_OUT0_AUD_ACM_MCLK_OUT0        0x0600004c
-                               SC_P_QSPI1A_DATA1_LSIO_GPIO4_IO25       0x0600004c
-                               SC_P_SCU_GPIO0_03_LSIO_GPIO0_IO31       0x0600004c
+                               SC_P_USB_SS3_TC0_LSIO_GPIO4_IO03          0x06000048
+                               SC_P_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06       0x06000021
+                               SC_P_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07       0x06000021
+                               SC_P_QSPI1A_SS1_B_LSIO_GPIO4_IO20                 0x06000021
+                               SC_P_QSPI1A_DATA2_LSIO_GPIO4_IO24                 0x06000021
+                               SC_P_QSPI1A_DATA3_LSIO_GPIO4_IO23                 0x06000021
                        >;
                };
 
                        >;
                };
 
+               pinctrl_flexspi0: flexspi0grp {
+                       fsl,pins = <
+                               SC_P_QSPI0A_DATA0_LSIO_QSPI0A_DATA0     0x06000021
+                               SC_P_QSPI0A_DATA1_LSIO_QSPI0A_DATA1     0x06000021
+                               SC_P_QSPI0A_DATA2_LSIO_QSPI0A_DATA2     0x06000021
+                               SC_P_QSPI0A_DATA3_LSIO_QSPI0A_DATA3     0x06000021
+                               SC_P_QSPI0A_DQS_LSIO_QSPI0A_DQS         0x06000021
+                               SC_P_QSPI0A_SS0_B_LSIO_QSPI0A_SS0_B     0x06000021
+                               SC_P_QSPI0A_SS1_B_LSIO_QSPI0A_SS1_B     0x06000021
+                               SC_P_QSPI0A_SCLK_LSIO_QSPI0A_SCLK       0x06000021
+                               SC_P_QSPI0B_SCLK_LSIO_QSPI0B_SCLK       0x06000021
+                               SC_P_QSPI0B_DATA0_LSIO_QSPI0B_DATA0     0x06000021
+                               SC_P_QSPI0B_DATA1_LSIO_QSPI0B_DATA1     0x06000021
+                               SC_P_QSPI0B_DATA2_LSIO_QSPI0B_DATA2     0x06000021
+                               SC_P_QSPI0B_DATA3_LSIO_QSPI0B_DATA3     0x06000021
+                               SC_P_QSPI0B_DQS_LSIO_QSPI0B_DQS         0x06000021
+                               SC_P_QSPI0B_SS0_B_LSIO_QSPI0B_SS0_B     0x06000021
+                               SC_P_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B     0x06000021
+                       >;
+               };
+
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
                                SC_P_UART0_RX_DMA_UART0_RX              0x06000020
                        >;
                };
 
+               pinctrl_i2c0: i2c0grp {
+                       fsl,pins = <
+                               SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL       0x06000021
+                               SC_P_HDMI_TX0_TS_SDA_DMA_I2C0_SDA       0x06000021
+                       >;
+               };
+
+               pinctrl_pciea: pcieagrp{
+                       fsl,pins = <
+                               SC_P_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27        0x06000021
+                               SC_P_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28          0x04000021
+                               SC_P_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29         0x06000021
+                               SC_P_USDHC2_RESET_B_LSIO_GPIO4_IO09             0x06000021
+                       >;
+               };
+
+               pinctrl_typec: typecgrp {
+                       fsl,pins = <
+                               SC_P_QSPI1A_SS0_B_LSIO_GPIO4_IO19       0x60
+                               SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06        0x60
+                               SC_P_QSPI1A_DATA0_LSIO_GPIO4_IO26       0x00000021
+                       >;
+               };
+
+               pinctrl_usbotg1: usbotg1 {
+                       fsl,pins = <
+                               SC_P_USB_SS3_TC0_CONN_USB_OTG1_PWR              0x00000021
+                       >;
+               };
+
                pinctrl_usdhc1: usdhc1grp {
                        fsl,pins = <
                                SC_P_EMMC0_CLK_CONN_EMMC0_CLK           0x06000041
                                SC_P_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021
                        >;
                };
+
+               pinctrl_lvds0_lpi2c1: lvds0lpi2c1grp {
+                       fsl,pins = <
+                               SC_P_LVDS0_I2C1_SCL_LVDS0_I2C1_SCL      0xc600004c
+                               SC_P_LVDS0_I2C1_SDA_LVDS0_I2C1_SDA      0xc600004c
+                       >;
+               };
+
+               pinctrl_lvds1_lpi2c1: lvds1lpi2c1grp {
+                       fsl,pins = <
+                               SC_P_LVDS1_I2C1_SCL_LVDS1_I2C1_SCL      0xc600004c
+                               SC_P_LVDS1_I2C1_SDA_LVDS1_I2C1_SDA      0xc600004c
+                       >;
+               };
        };
 };
 
+&gpio1 {
+       status = "okay";
+};
+
+&gpio2 {
+       status = "okay";
+};
+
+&gpio4 {
+       status = "okay";
+};
+
+&gpio5 {
+       status = "okay";
+};
+
+&usbotg1 {
+       vbus-supply = <&reg_usb_otg1_vbus>;
+       srp-disable;
+       hnp-disable;
+       adp-disable;
+       disable-over-current;
+       status = "okay";
+};
+
+&usbotg3 {
+       status = "okay";
+};
+
 &usdhc1 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1>;
+       pinctrl-2 = <&pinctrl_usdhc1>;
        bus-width = <8>;
        non-removable;
        status = "okay";
 };
 
 &usdhc2 {
-       pinctrl-names = "default";
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+       pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
        bus-width = <4>;
        cd-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
        wp-gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>;
                        reg = <1>;
                        at803x,eee-disabled;
                        at803x,vddio-1p8v;
-                       status = "disabled";
                };
        };
 };
 
+&fec2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_fec2>;
+       phy-mode = "rgmii";
+       phy-handle = <&ethphy1>;
+       fsl,ar8031-phy-fixup;
+       fsl,magic-packet;
+       status = "okay";
+};
+
+&flexspi0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexspi0>;
+       status = "okay";
+
+       flash0: mt35xu512aba@0 {
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <29000000>;
+               spi-nor,ddr-quad-read-dummy = <8>;
+       };
+};
+
+&i2c0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0>;
+       status = "okay";
+
+       max7322: gpio@68 {
+               compatible = "maxim,max7322";
+               reg = <0x68>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       typec_ptn5110: typec@50 {
+               compatible = "usb,tcpci";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_typec>;
+               reg = <0x51>;
+               interrupt-parent = <&gpio4>;
+               interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+               ss-sel-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>;
+               reset-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
+               src-pdos = <0x380190c8 0x3803c0c8>;
+               port-type = "drp";
+               sink-disable;
+               default-role = "source";
+               status = "okay";
+       };
+};
+
 &lpuart0 { /* console */
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lpuart0>;
        status = "okay";
 };
 
-&gpio1 {
+&i2c1_lvds0 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lvds0_lpi2c1>;
+       clock-frequency = <100000>;
+       status = "okay";
+
+       lvds-to-hdmi-bridge@4c {
+               compatible = "ite,it6263";
+               reg = <0x4c>;
+       };
+};
+
+&i2c1_lvds1 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_lvds1_lpi2c1>;
+       clock-frequency = <100000>;
        status = "okay";
+
+       lvds-to-hdmi-bridge@4c {
+               compatible = "ite,it6263";
+               reg = <0x4c>;
+       };
+};
+
+
+&tsens {
+       tsens-num = <6>;
+};
+
+&thermal_zones {
+       pmic-thermal0 {
+               polling-delay-passive = <250>;
+               polling-delay = <2000>;
+               thermal-sensors = <&tsens 5>;
+               trips {
+                       pmic_alert0: trip0 {
+                               temperature = <110000>;
+                               hysteresis = <2000>;
+                               type = "passive";
+                       };
+                       pmic_crit0: trip1 {
+                               temperature = <125000>;
+                               hysteresis = <2000>;
+                               type = "critical";
+                       };
+               };
+               cooling-maps {
+                       map0 {
+                               trip = <&pmic_alert0>;
+                               cooling-device =
+                               <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       };
+                       map1 {
+                               trip = <&pmic_alert0>;
+                               cooling-device =
+                               <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+                       };
+               };
+       };
 };