MLK-16706-3 video: fbdev: mipi_dsi_northwest: add map tables for 'CM', 'CN' and 'CO'

The 'CM', 'CN' and 'CO' possible values have no apparent
relationships with their registers config values. So add
three tables to describe mappings for them.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

diff --git a/drivers/video/fbdev/mxc/mipi_dsi_northwest.c b/drivers/video/fbdev/mxc/mipi_dsi_northwest.c
index 850ae2d..29b92ff 100644 (file)
--- a/drivers/video/fbdev/mxc/mipi_dsi_northwest.c
+++ b/drivers/video/fbdev/mxc/mipi_dsi_northwest.c
@@ -98,6 +98,76 @@ struct pll_divider {
        unsigned int co;  /* outdivider */
 };
 
+/**
+ * 'CM' value to 'CM' reigister config value map
+ * 'CM' = [16, 255];
+ */
+static unsigned int cm_map_table[240] = {
+       0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, /* 16 ~ 23 */
+       0xf8, 0xf9, 0xfa, 0xfb, 0xfc, 0xfd, 0xfe, 0xff, /* 24 ~ 31 */
+
+       0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, /* 32 ~ 39 */
+       0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, /* 40 ~ 47 */
+
+       0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, /* 48 ~ 55 */
+       0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, /* 56 ~ 63 */
+
+       0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, /* 64 ~ 71 */
+       0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, /* 72 ~ 79 */
+
+       0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, /* 80 ~ 87 */
+       0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, /* 88 ~ 95 */
+
+       0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, /* 96  ~ 103 */
+       0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, /* 104 ~ 111 */
+
+       0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7, /* 112 ~ 119 */
+       0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, /* 120 ~ 127 */
+
+       0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 128 ~ 135 */
+       0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, /* 136 ~ 143 */
+
+       0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, /* 144 ~ 151 */
+       0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, /* 152 ~ 159 */
+
+       0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, /* 160 ~ 167 */
+       0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, /* 168 ~ 175 */
+
+       0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, /* 176 ~ 183 */
+       0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, /* 184 ~ 191 */
+
+       0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* 192 ~ 199 */
+       0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, /* 200 ~ 207 */
+
+       0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, /* 208 ~ 215 */
+       0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, /* 216 ~ 223 */
+
+       0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, /* 224 ~ 231 */
+       0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, /* 232 ~ 239 */
+
+       0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, /* 240 ~ 247 */
+       0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f  /* 248 ~ 255 */
+};
+
+/**
+ * map 'CN' value to 'CN' reigister config value
+ * 'CN' = [1, 32];
+ */
+static unsigned int cn_map_table[32] = {
+       0x1f, 0x00, 0x10, 0x18, 0x1c, 0x0e, 0x07, 0x13, /* 1  ~ 8  */
+       0x09, 0x04, 0x02, 0x11, 0x08, 0x14, 0x0a, 0x15, /* 9  ~ 16 */
+       0x1a, 0x1d, 0x1e, 0x0f, 0x17, 0x1b, 0x0d, 0x16, /* 17 ~ 24 */
+       0x0b, 0x05, 0x12, 0x19, 0x0c, 0x06, 0x03, 0x01  /* 25 ~ 32 */
+};
+
+/**
+ * map 'CO' value to 'CO' reigister config value
+ * 'CO' = { 1, 2, 4, 8 };
+ */
+static unsigned int co_map_table[4] = {
+       0x0, 0x1, 0x2, 0x3
+};
+
 static DECLARE_COMPLETION(dsi_rx_done);
 static DECLARE_COMPLETION(dsi_tx_done);
 
@@ -330,23 +400,23 @@ static int mipi_dsi_dphy_init(struct mipi_dsi_info *mipi_dsi)
                 * refclock = 24MHz
                 * pll vco = 24 * 40 / (3 * 1) = 320MHz
                 */
-               div.cn = 0x10; /* 3  */
-               div.cm = 0xc8; /* 40 */
-               div.co = 0x0;  /* 1  */
+               div.cn = cn_map_table[3 - 1]; /* 3  */
+               div.cm = cm_map_table[40 - 16]; /* 40 */
+               div.co = co_map_table[1 >> 1];  /* 1  */
        } else {
 #ifdef CONFIG_FB_IMX64
                switch (mipi_dsi->vmode_index) {
                case 34:        /* 1920x1080@30Hz */
                        /* pll vco = 27 * 33 / (1 * 2) = 445.5MHz */
-                       div.cn = 0x1f; /* 1 */
-                       div.cm = 0xc1; /* 33 */
-                       div.co = 0x1;  /* 2 */
+                       div.cn = cn_map_table[1 - 1]; /* 1 */
+                       div.cm = cm_map_table[33 - 16]; /* 33 */
+                       div.co = co_map_table[2 >> 1];  /* 2 */
                        break;
                case 16:        /* 1920x1080@60Hz */
                        /* pll vco = 27 * 33 / (1 * 1) = 891MHz */
-                       div.cn = 0x1f; /* 1 */
-                       div.cm = 0xc1; /* 33 */
-                       div.co = 0x0;  /* 1 */
+                       div.cn = cn_map_table[1 - 1]; /* 1 */
+                       div.cm = cm_map_table[33 - 16]; /* 33 */
+                       div.co = co_map_table[1 >> 1];  /* 1 */
                        break;
                default:
                        /* TODO: not support yet */
@@ -354,9 +424,9 @@ static int mipi_dsi_dphy_init(struct mipi_dsi_info *mipi_dsi)
                }
 #else
                /* pll vco = 24 * 63 / (5 * 1) = 302.4MHz */
-               div.cn = 0x1C; /* 5  */
-               div.cm = 0xDF; /* 63 */
-               div.co = 0x0;  /* 1  */
+               div.cn = cn_map_table[5 - 1]; /* 5  */
+               div.cm = cm_map_table[63 - 16]; /* 63 */
+               div.co = co_map_table[1 >> 1];  /* 1  */
 #endif
        }