MLK-16350-1: ARM64: dts: add the clocks for each node
authorShengjiu Wang <shengjiu.wang@freescale.com>
Fri, 1 Sep 2017 05:28:23 +0000 (13:28 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:38:25 +0000 (15:38 -0500)
In current design, the assigned-clock-rates is bind with
each device node, even they are using same parent clocks.
so add clocks for each device.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-mqs.dts
arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-spdif.dts
arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts

index 6a12760..4c26ccd 100644 (file)
 };
 
 &sai1 {
+       assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
 
 &sai0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai0>;
+       assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
index 85f792e..15eb96f 100644 (file)
 &spdif0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spdif0>;
+       assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
 
 &sai1 {
+       assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
 
 &sai0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai0>;
+       assigned-clocks =<&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
index dd2bc19..ab46835 100644 (file)
 };
 
 &asrc0 {
+       assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        fsl,asrc-rate  = <48000>;
        status = "okay";
 };
 
 &asrc1 {
        fsl,asrc-rate = <48000>;
+       assigned-clocks = <&clk IMX8QM_AUD_PLL0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QM_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };