drm/i915/guc: drop stage_pool debugfs
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Thu, 26 Mar 2020 18:11:17 +0000 (11:11 -0700)
committerChris Wilson <chris@chris-wilson.co.uk>
Thu, 26 Mar 2020 21:21:39 +0000 (21:21 +0000)
The pool will be private to GuC in the new submission scheme, so we
won't be able to print it and we can just drop the current legacy code.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200326181121.16869-3-daniele.ceraolospurio@intel.com
drivers/gpu/drm/i915/i915_debugfs.c

index 6ca7971..de94fcd 100644 (file)
@@ -1356,58 +1356,6 @@ static int i915_guc_info(struct seq_file *m, void *data)
        return 0;
 }
 
-static int i915_guc_stage_pool(struct seq_file *m, void *data)
-{
-       struct drm_i915_private *dev_priv = node_to_i915(m->private);
-       struct intel_uc *uc = &dev_priv->gt.uc;
-       struct guc_stage_desc *desc = uc->guc.stage_desc_pool_vaddr;
-       int index;
-
-       if (!intel_uc_uses_guc_submission(uc))
-               return -ENODEV;
-
-       for (index = 0; index < GUC_MAX_STAGE_DESCRIPTORS; index++, desc++) {
-               struct intel_engine_cs *engine;
-
-               if (!(desc->attribute & GUC_STAGE_DESC_ATTR_ACTIVE))
-                       continue;
-
-               seq_printf(m, "GuC stage descriptor %u:\n", index);
-               seq_printf(m, "\tIndex: %u\n", desc->stage_id);
-               seq_printf(m, "\tAttribute: 0x%x\n", desc->attribute);
-               seq_printf(m, "\tPriority: %d\n", desc->priority);
-               seq_printf(m, "\tDoorbell id: %d\n", desc->db_id);
-               seq_printf(m, "\tEngines used: 0x%x\n",
-                          desc->engines_used);
-               seq_printf(m, "\tDoorbell trigger phy: 0x%llx, cpu: 0x%llx, uK: 0x%x\n",
-                          desc->db_trigger_phy,
-                          desc->db_trigger_cpu,
-                          desc->db_trigger_uk);
-               seq_printf(m, "\tProcess descriptor: 0x%x\n",
-                          desc->process_desc);
-               seq_printf(m, "\tWorkqueue address: 0x%x, size: 0x%x\n",
-                          desc->wq_addr, desc->wq_size);
-               seq_putc(m, '\n');
-
-               for_each_uabi_engine(engine, dev_priv) {
-                       u32 guc_engine_id = engine->guc_id;
-                       struct guc_execlist_context *lrc =
-                                               &desc->lrc[guc_engine_id];
-
-                       seq_printf(m, "\t%s LRC:\n", engine->name);
-                       seq_printf(m, "\t\tContext desc: 0x%x\n",
-                                  lrc->context_desc);
-                       seq_printf(m, "\t\tContext id: 0x%x\n", lrc->context_id);
-                       seq_printf(m, "\t\tLRCA: 0x%x\n", lrc->ring_lrca);
-                       seq_printf(m, "\t\tRing begin: 0x%x\n", lrc->ring_begin);
-                       seq_printf(m, "\t\tRing end: 0x%x\n", lrc->ring_end);
-                       seq_putc(m, '\n');
-               }
-       }
-
-       return 0;
-}
-
 static int i915_guc_log_dump(struct seq_file *m, void *data)
 {
        struct drm_info_node *node = m->private;
@@ -2143,7 +2091,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
        {"i915_guc_load_status", i915_guc_load_status_info, 0},
        {"i915_guc_log_dump", i915_guc_log_dump, 0},
        {"i915_guc_load_err_log_dump", i915_guc_log_dump, 0, (void *)1},
-       {"i915_guc_stage_pool", i915_guc_stage_pool, 0},
        {"i915_huc_load_status", i915_huc_load_status_info, 0},
        {"i915_frequency_info", i915_frequency_info, 0},
        {"i915_ring_freq_table", i915_ring_freq_table, 0},