usb: dwc2: gadget: Replace phyif with phy_utmi_width

The phy utmi width information is already set in hsotg params,
phyif is only used in few places and I don't see any reason to
not use hsotg's params.

Moreover the utmi width was being forced to 16 bits by platform
initialization which doesn't take in account HW configuration.

Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index 764c78e..8e3edf1 100644 (file)
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -871,7 +871,6 @@ struct dwc2_hregs_backup {
  *                      removed once all SoCs support usb transceiver.
  * @supplies:           Definition of USB power supplies
  * @vbus_supply:        Regulator supplying vbus.
- * @phyif:              PHY interface width
  * @lock:              Spinlock that protects all the driver data structures
  * @priv:              Stores a pointer to the struct usb_hcd
  * @queuing_high_bandwidth: True if multiple packets of a high-bandwidth
@@ -1056,7 +1055,6 @@ struct dwc2_hsotg {
        struct dwc2_hsotg_plat *plat;
        struct regulator_bulk_data supplies[DWC2_NUM_SUPPLIES];
        struct regulator *vbus_supply;
-       u32 phyif;
 
        spinlock_t lock;
        void *priv;

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 9b737c4..614f8c3 100644 (file)
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -3314,20 +3314,28 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
 
        /* keep other bits untouched (so e.g. forced modes are not lost) */
        usbcfg = dwc2_readl(hsotg, GUSBCFG);
+       /* remove the HNP/SRP */
        usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
-               GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
+               GUSBCFG_HNPCAP);
+       usbcfg |= GUSBCFG_TOUTCAL(7);
 
        if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_FS &&
            (hsotg->params.speed == DWC2_SPEED_PARAM_FULL ||
             hsotg->params.speed == DWC2_SPEED_PARAM_LOW)) {
                /* FS/LS Dedicated Transceiver Interface */
                usbcfg |= GUSBCFG_PHYSEL;
-       } else {
-               /* set the PLL on, remove the HNP/SRP and set the PHY */
-               val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
-               usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) |
-                       (val << GUSBCFG_USBTRDTIM_SHIFT);
+       } else if (hsotg->params.phy_type == DWC2_PHY_TYPE_PARAM_UTMI) {
+               if (hsotg->params.phy_utmi_width == 16)
+                       usbcfg |= GUSBCFG_PHYIF16;
+
+               /* Set turnaround time */
+               usbcfg &= ~GUSBCFG_USBTRDTIM_MASK;
+               if (hsotg->params.phy_utmi_width == 16)
+                       usbcfg |= 5 << GUSBCFG_USBTRDTIM_SHIFT;
+               else
+                       usbcfg |= 9 << GUSBCFG_USBTRDTIM_SHIFT;
        }
+
        dwc2_writel(hsotg, usbcfg, GUSBCFG);
 
        dwc2_hsotg_init_fifo(hsotg);

diff --git a/drivers/usb/dwc2/platform.c b/drivers/usb/dwc2/platform.c
index c01fa8f..d10a7f8 100644 (file)
--- a/drivers/usb/dwc2/platform.c
+++ b/drivers/usb/dwc2/platform.c
@@ -230,9 +230,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
 
        reset_control_deassert(hsotg->reset_ecc);
 
-       /* Set default UTMI width */
-       hsotg->phyif = GUSBCFG_PHYIF16;
-
        /*
         * Attempt to find a generic PHY, then look for an old style
         * USB PHY and then fall back to pdata
@@ -280,7 +277,7 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)
                 * width is 8-bit and set the phyif appropriately.
                 */
                if (phy_get_bus_width(hsotg->phy) == 8)
-                       hsotg->phyif = GUSBCFG_PHYIF8;
+                       hsotg->params.phy_utmi_width = 8;
        }
 
        /* Clock */