HSM-24: arm64: dtx: imx8qxp: enable more seco MU users
authorStéphane Dion <stephane.dion_1@nxp.com>
Tue, 25 Jun 2019 12:36:15 +0000 (14:36 +0200)
committerSilvano di Ninno <silvano.dininno@nxp.com>
Fri, 11 Oct 2019 17:31:58 +0000 (19:31 +0200)
Enable all SECO MUs and increase number of users on the first one.

Signed-off-by: Stéphane Dion <stephane.dion_1@nxp.com>
(cherry picked from commit 56099536022e7e66cfc932069aa4a4701d84aa0b)

arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi
arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi

index 32b7553..1c562d3 100644 (file)
                reg = <0x0 0x31560000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_2>;
                interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,seco_mu_id = <1>;
+               fsl,seco_max_users = <4>;
                status = "disabled";
        };
 
                reg = <0x0 0x31570000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_3>;
                interrupts = <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,seco_mu_id = <2>;
+               fsl,seco_max_users = <2>;
                status = "disabled";
        };
 
                reg = <0x0 0x31580000 0x0 0x10000>;
                power-domains = <&pd_seco_mu_4>;
                interrupts = <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>;
+               fsl,seco_mu_id = <3>;
+               fsl,seco_max_users = <2>;
                status = "disabled";
        };
 
index 659b360..3e1782f 100644 (file)
        mu_seco2: mu@31560000 {
                status = "okay";
        };
+
+       mu_seco3: mu@31570000 {
+               status = "okay";
+       };
+
+       mu_seco4: mu@31580000 {
+               status = "okay";
+       };
 };
 
 &A35_2 {