MLK-18578: hdmi_rx: fix issue that ARC can't work in 4k.
authorShengjiu Wang <shengjiu.wang@nxp.com>
Fri, 8 Jun 2018 09:59:53 +0000 (17:59 +0800)
committerSandor Yu <Sandor.yu@nxp.com>
Fri, 19 Apr 2019 02:40:50 +0000 (10:40 +0800)
After changing the deemphasis to 0dB in TX_DIG_CTRL_REG_1
the issue that ARC can't work with 4k resolution is fixed

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Sandor.yu <sandor.yu@nxp.com>
drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.c
drivers/media/platform/imx8/hdmi/API_AFE_ss28fdsoi_hdmirx.h

index d03b606..7961b6a 100644 (file)
@@ -97,6 +97,7 @@ void arc_config(state_struct *state)
 
        write16(state, TXDA_CYA_AUXDA_CYA_ADDR, 0x0001);
 
+       write16(state, TX_DIG_CTRL_REG_1_ADDR, 0x3);
        write16(state, TX_DIG_CTRL_REG_2_ADDR, 0x0024);
 
        reg_val = read16(state, TX_ANA_CTRL_REG_1_ADDR);
@@ -110,7 +111,7 @@ void arc_config(state_struct *state)
        write16(state, TX_ANA_CTRL_REG_1_ADDR, 0x2018);
        write16(state, TX_ANA_CTRL_REG_1_ADDR, 0x2098);
        write16(state, TX_ANA_CTRL_REG_2_ADDR, 0x030C);
-       write16(state, TX_ANA_CTRL_REG_5_ADDR, 0x0000);
+       write16(state, TX_ANA_CTRL_REG_5_ADDR, 0x0010);
        write16(state, TX_ANA_CTRL_REG_4_ADDR, 0x4001);
        write16(state, TX_ANA_CTRL_REG_1_ADDR, 0x2198);
        write16(state, TX_ANA_CTRL_REG_2_ADDR, 0x030D);
index 225e767..14992f6 100644 (file)
@@ -87,6 +87,7 @@
 #define XCVR_DIAG_RX_LANE_CAL_RST_TMR_ADDR     0x40EA
 #define TX_ANA_CTRL_REG_1_ADDR                 0x5020
 #define TX_ANA_CTRL_REG_2_ADDR                 0x5021
+#define TX_DIG_CTRL_REG_1_ADDR                 0x5023
 #define TX_DIG_CTRL_REG_2_ADDR                 0x5024
 #define TXDA_CYA_AUXDA_CYA_ADDR                0x5025
 #define TX_ANA_CTRL_REG_3_ADDR                 0x5026