MLK-16947: ARM64: dts: imx8qxp: add assigned-clocks for audio node
authorShengjiu Wang <shengjiu.wang@nxp.com>
Wed, 22 Nov 2017 08:07:21 +0000 (16:07 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:55:37 +0000 (15:55 -0500)
add assigned-clocks for audio node, spdif and sai for the assigned
-clocks is bound with power-domains. if the clock is needed by
the device, should add it in dts.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-mqs.dts
arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-spdif.dts
arch/arm64/boot/dts/freescale/fsl-imx8qxp-lpddr4-arm2-wm8962.dts

index b2169be..17abb9b 100644 (file)
@@ -52,5 +52,9 @@
 };
 
 &sai1 {
+       assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };
index a4f0ecf..4d1688d 100644 (file)
        compatible = "fsl,imx8qxp-v1-spdif";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spdif0>;
+       assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        dmas = <&edma2 23 0 7>, <&edma2 21 0 6>;
        status = "okay";
 };
index 57fef5f..9a65568 100644 (file)
 &sai0 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_sai0>;
+       assigned-clocks = <&clk IMX8QXP_AUD_PLL0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+                       <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>;
+       assigned-clock-rates = <786432000>, <49152000>, <24576000>;
        status = "okay";
 };