PXA: Add necessary information for RELOC

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

diff --git a/board/vpac270/vpac270.c b/board/vpac270/vpac270.c
index 1557d1b..f91ff97 100644 (file)
--- a/board/vpac270/vpac270.c
+++ b/board/vpac270/vpac270.c
@@ -49,7 +49,17 @@ struct serial_device *default_serial_console(void)
        return &serial_ffuart_device;
 }
 
+
 int dram_init(void)
+{
+       gd->ram_size = PHYS_SDRAM_1_SIZE;
+#ifdef CONFIG_256M_U_BOOT
+       gd->ram_size += PHYS_SDRAM_2_SIZE;
+#endif
+       return 0;
+}
+
+void dram_init_banksize(void)
 {
        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
@@ -58,7 +68,6 @@ int dram_init(void)
        gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
        gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 #endif
-       return 0;
 }
 
 #ifdef CONFIG_CMD_USB

diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index 9066a24..5e2a285 100644 (file)
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -130,6 +130,9 @@
 
 #define        CONFIG_SYS_LOAD_ADDR            0xa1000000
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NOR FLASH
  */

diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index 477b94a..98b69e3 100644 (file)
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -161,6 +161,9 @@
 
 #define CONFIG_SYS_FLASH_BASE                  PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */

diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 277ff67..5f457f8 100644 (file)
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -169,6 +169,9 @@
 
 #define        CONFIG_SYS_LOAD_ADDR            (0xa1000000)
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NOR FLASH
  */

diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index 998e179..d1c1a48 100644 (file)
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -145,6 +145,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * FLASH and environment organization
  */

diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index 0661d65..ae05734 100644 (file)
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -181,6 +181,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 # if 0
 /* FIXME: switch to _documented_ registers */
 /*

diff --git a/include/configs/delta.h b/include/configs/delta.h
index d930fb4..d53acbf 100644 (file)
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -218,6 +218,9 @@
 
 #undef CONFIG_SYS_SKIP_DRAM_SCRUB
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NAND Flash
  */

diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 9cb0d42..007cceb 100644 (file)
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -192,6 +192,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * JFFS2 partitions
  *

diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index 0a69210..3a99ec2 100644 (file)
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -176,6 +176,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 #define FPGA_REGS_BASE_PHYSICAL 0x08000000
 
 /*

diff --git a/include/configs/palmld.h b/include/configs/palmld.h
index affc116..926728b 100644 (file)
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -154,6 +154,9 @@
 
 #define        CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NOR FLASH
  */

diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h
index f4fc9cd..fe87648 100644 (file)
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -155,6 +155,9 @@
 
 #define        CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NOR FLASH
  */

diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index 9e69411..3b6e60a 100644 (file)
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -179,6 +179,9 @@
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 #define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_FLASH_BASE
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */

diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 6c1defc..4581674 100644 (file)
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -292,6 +292,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */

diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index fa5aae8..4743495 100644 (file)
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -212,6 +212,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * GPIO settings
  */

diff --git a/include/configs/vpac270.h b/include/configs/vpac270.h
index b8440a1..1bcd2f3 100644 (file)
--- a/include/configs/vpac270.h
+++ b/include/configs/vpac270.h
@@ -181,6 +181,9 @@
 #define        CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 
 #define        CONFIG_SYS_LOAD_ADDR            (0x5c000000)
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         \
+       (CONFIG_SYS_GBL_DATA_SIZE + CONFIG_STACKSIZE + PHYS_SDRAM_1)
 
 /*
  * NOR FLASH

diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
index 9a20cce..a961a27 100644 (file)
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -183,6 +183,10 @@
 #define CONFIG_ENV_ADDR                0x20000         /* absolute address for now  */
 #define CONFIG_ENV_SIZE                0x2000
 
+#define        PHYS_SDRAM_1                    WEP_SDRAM_1
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 #undef  CONFIG_ENV_OVERWRITE                    /* env is not writable now   */
 
 /*

diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 1329f0f..67d4106 100644 (file)
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -167,6 +167,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * FLASH and environment organization
  */

diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index cd56ce7..2ff9a28 100644 (file)
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -174,6 +174,9 @@
 
 #define CONFIG_SYS_FLASH_BASE          PHYS_FLASH_1
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * FLASH and environment organization
  */

diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index f68461b..9606b53 100644 (file)
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -53,6 +53,9 @@
 #define CONFIG_SYS_DRAM_BASE                   0xa0000000
 #define CONFIG_SYS_DRAM_SIZE                   0x04000000
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /* FLASH organization */
 #define CONFIG_SYS_MAX_FLASH_BANKS             1               /* max number of memory banks           */
 #define CONFIG_SYS_MAX_FLASH_SECT              128             /* max number of sectors on one chip    */

diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index a5a873b..642c575 100644 (file)
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -175,6 +175,9 @@ unsigned char zipitz2_spi_read(void);
 
 #define        CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_DRAM_BASE
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
+
 /*
  * NOR FLASH
  */

diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index c8aa046..c33ca2d 100644 (file)
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -190,6 +190,8 @@
 
 #undef CONFIG_SYS_SKIP_DRAM_SCRUB
 
+#define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM_1
+#define        CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1)
 
 /*
  * NAND Flash