clk: davinci: Add platform information for TI DM646x PLL
authorDavid Lechner <david@lechnology.com>
Fri, 16 Mar 2018 02:52:24 +0000 (21:52 -0500)
committerStephen Boyd <sboyd@kernel.org>
Tue, 20 Mar 2018 17:16:26 +0000 (10:16 -0700)
This adds platform-specific declarations for the PLL clocks on TI
DM646x based systems.

Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/davinci/Makefile
drivers/clk/davinci/pll-dm646x.c [new file with mode: 0644]
drivers/clk/davinci/pll.c
drivers/clk/davinci/pll.h

index 59d8ab6..d471386 100644 (file)
@@ -7,4 +7,5 @@ obj-$(CONFIG_ARCH_DAVINCI_DA850)        += pll-da850.o
 obj-$(CONFIG_ARCH_DAVINCI_DM355)       += pll-dm355.o
 obj-$(CONFIG_ARCH_DAVINCI_DM365)       += pll-dm365.o
 obj-$(CONFIG_ARCH_DAVINCI_DM644x)      += pll-dm644x.o
+obj-$(CONFIG_ARCH_DAVINCI_DM646x)      += pll-dm646x.o
 endif
diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c
new file mode 100644 (file)
index 0000000..a61cc32
--- /dev/null
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PLL clock descriptions for TI DM646X
+ *
+ * Copyright (C) 2018 David Lechner <david@lechnology.com>
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/init.h>
+#include <linux/types.h>
+
+#include "pll.h"
+
+static const struct davinci_pll_clk_info dm646x_pll1_info = {
+       .name = "pll1",
+       .pllm_mask = GENMASK(4, 0),
+       .pllm_min = 14,
+       .pllm_max = 32,
+       .flags = PLL_HAS_CLKMODE,
+};
+
+SYSCLK(1, pll1_sysclk1, pll1_pllen, 4, SYSCLK_FIXED_DIV);
+SYSCLK(2, pll1_sysclk2, pll1_pllen, 4, SYSCLK_FIXED_DIV);
+SYSCLK(3, pll1_sysclk3, pll1_pllen, 4, SYSCLK_FIXED_DIV);
+SYSCLK(4, pll1_sysclk4, pll1_pllen, 4, 0);
+SYSCLK(5, pll1_sysclk5, pll1_pllen, 4, 0);
+SYSCLK(6, pll1_sysclk6, pll1_pllen, 4, 0);
+SYSCLK(8, pll1_sysclk8, pll1_pllen, 4, 0);
+SYSCLK(9, pll1_sysclk9, pll1_pllen, 4, 0);
+
+int dm646x_pll1_init(struct device *dev, void __iomem *base)
+{
+       struct clk *clk;
+
+       davinci_pll_clk_register(dev, &dm646x_pll1_info, "ref_clk", base);
+
+       clk = davinci_pll_sysclk_register(dev, &pll1_sysclk1, base);
+       clk_register_clkdev(clk, "pll1_sysclk1", "dm646x-psc");
+
+       clk = davinci_pll_sysclk_register(dev, &pll1_sysclk2, base);
+       clk_register_clkdev(clk, "pll1_sysclk2", "dm646x-psc");
+
+       clk = davinci_pll_sysclk_register(dev, &pll1_sysclk3, base);
+       clk_register_clkdev(clk, "pll1_sysclk3", "dm646x-psc");
+       clk_register_clkdev(clk, NULL, "davinci-wdt");
+
+       clk = davinci_pll_sysclk_register(dev, &pll1_sysclk4, base);
+       clk_register_clkdev(clk, "pll1_sysclk4", "dm646x-psc");
+
+       clk = davinci_pll_sysclk_register(dev, &pll1_sysclk5, base);
+       clk_register_clkdev(clk, "pll1_sysclk5", "dm646x-psc");
+
+       davinci_pll_sysclk_register(dev, &pll1_sysclk6, base);
+
+       davinci_pll_sysclk_register(dev, &pll1_sysclk8, base);
+
+       davinci_pll_sysclk_register(dev, &pll1_sysclk9, base);
+
+       davinci_pll_sysclkbp_clk_register(dev, "pll1_sysclkbp", base);
+
+       davinci_pll_auxclk_register(dev, "pll1_auxclk", base);
+
+       return 0;
+}
+
+static const struct davinci_pll_clk_info dm646x_pll2_info = {
+       .name = "pll2",
+       .pllm_mask = GENMASK(4, 0),
+       .pllm_min = 14,
+       .pllm_max = 32,
+       .flags = 0,
+};
+
+SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0);
+
+int dm646x_pll2_init(struct device *dev, void __iomem *base)
+{
+       davinci_pll_clk_register(dev, &dm646x_pll2_info, "oscin", base);
+
+       davinci_pll_sysclk_register(dev, &pll2_sysclk1, base);
+
+       return 0;
+}
index 4f86f35..89d30bf 100644 (file)
@@ -786,6 +786,8 @@ static const struct platform_device_id davinci_pll_id_table[] = {
        { .name = "dm365-pll2",  .driver_data = (kernel_ulong_t)dm365_pll2_init  },
        { .name = "dm644x-pll1", .driver_data = (kernel_ulong_t)dm644x_pll1_init },
        { .name = "dm644x-pll2", .driver_data = (kernel_ulong_t)dm644x_pll2_init },
+       { .name = "dm646x-pll1", .driver_data = (kernel_ulong_t)dm646x_pll1_init },
+       { .name = "dm646x-pll2", .driver_data = (kernel_ulong_t)dm646x_pll2_init },
        { }
 };
 
index d8af4f5..b1b6fb2 100644 (file)
@@ -135,4 +135,7 @@ int dm365_pll2_init(struct device *dev, void __iomem *base);
 int dm644x_pll1_init(struct device *dev, void __iomem *base);
 int dm644x_pll2_init(struct device *dev, void __iomem *base);
 
+int dm646x_pll1_init(struct device *dev, void __iomem *base);
+int dm646x_pll2_init(struct device *dev, void __iomem *base);
+
 #endif /* __CLK_DAVINCI_PLL_H___ */