MLK-22440-3 clk: imx8mn: Fix incorrect parents
authorLeonard Crestez <leonard.crestez@nxp.com>
Wed, 14 Aug 2019 11:50:13 +0000 (14:50 +0300)
committerLeonard Crestez <leonard.crestez@nxp.com>
Thu, 15 Aug 2019 12:57:16 +0000 (15:57 +0300)
* Replace to audio_pll2_clk with audio_pll2_out
* Replace sys3_pll2_out with sys_pll3_out
* Replace sys1_pll_40m" with sys_pll1_40m
* Fix spelling qspi parents

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
drivers/clk/imx/clk-imx8mn.c

index a8a0046..967a147 100644 (file)
@@ -160,7 +160,7 @@ static const char *imx8mn_disp_axi_sels[] = {"osc_24m", "sys_pll2_1000m", "sys_p
                                             "sys_pll1_40m", "audio_pll2_out", "clk_ext1", "clk_ext4", };
 
 static const char *imx8mn_disp_apb_sels[] = {"osc_24m", "sys_pll2_125m", "sys_pll1_800m", "sys_pll3_out",
-                                            "sys1_pll_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", };
+                                            "sys_pll1_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", };
 
 static const char *imx8mn_usb_bus_sels[] = {"osc_24m", "sys_pll2_500m", "sys_pll1_800m", "sys_pll2_100m",
                                            "sys_pll2_200m", "clk_ext2", "clk_ext4", "audio_pll2_out", };
@@ -219,8 +219,8 @@ static const char *imx8mn_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll
 static const char *imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out", "sys_pll1_400m",
                                         "audio_pll2_out", "sys_pll3_out", "sys_pll2_250m", "video_pll1_out", };
 
-static const char *imx8mn_qspi_sels[] = {"osc_24m", "sys1_pll_400m", "sys_pll1_800m", "sys2_pll_500m",
-                                        "audio_pll2_out", "sys1_pll_266m", "sys3_pll2_out", "sys1_pll_100m", };
+static const char *imx8mn_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
+                                        "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
 
 static const char *imx8mn_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
                                           "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", };
@@ -271,7 +271,7 @@ static const char *imx8mn_pwm2_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_1
                                         "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
 
 static const char *imx8mn_pwm3_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
-                                        "sys3_pll2_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
+                                        "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
 
 static const char *imx8mn_pwm4_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m",
                                         "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", };
@@ -292,7 +292,7 @@ static const char *imx8mn_dsi_dbi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll
                                            "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
 
 static const char *imx8mn_usdhc3_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
-                                          "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
+                                          "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", };
 
 static const char *imx8mn_camera_pixel_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
                                              "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
@@ -314,7 +314,7 @@ static const char *imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_
 
 static const char *imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
 
-static const char *imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_clk",
+static const char *imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_out",
                                         "vpu_pll", "sys_pll1_80m", };
 static const char *imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m", "sys_pll2_166m", "sys_pll3_out",
                                         "audio_pll1_out", "video_pll1_out", "osc_32k", };