LF-1273-1 arm64: dts: imx8mp: add dsim and lcdif1 nodes

Add the 'mipi_dsi' and 'lcdif1' device nodes to i.MX8MP
platform.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 1f92696..67f3034 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -831,6 +831,64 @@
                        };
                };
 
+               aips4: bus@32c00000 {
+                       compatible = "simple-bus";
+                       reg = <0x32c00000 0x400000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       mipi_dsi: mipi_dsi@32e60000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx8mp-mipi-dsim";
+                               reg = <0x32e60000 0x10000>;
+                               clocks = <&clk IMX8MP_CLK_DUMMY>,
+                                        <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               clock-names = "cfg", "pll-ref";
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF>;
+                               assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>;
+                               assigned-clock-rates = <594000000>;
+                               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+
+                               port@0 {
+                                       dsim_from_lcdif: endpoint {
+                                               remote-endpoint = <&lcdif_to_dsim>;
+                                       };
+                               };
+                       };
+
+                       lcdif1: lcd-controller@32e80000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx8mp-lcdif1";
+                               reg = <0x32e80000 0x10000>;
+                               clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>,
+                                        <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
+                                        <&clk IMX8MP_CLK_MEDIA_APB_ROOT>;
+                               clock-names = "pix", "disp-axi", "disp-apb";
+                               assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>,
+                                                 <&clk IMX8MP_CLK_MEDIA_AXI>,
+                                                 <&clk IMX8MP_CLK_MEDIA_APB>;
+                               assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MP_SYS_PLL2_1000M>,
+                                                        <&clk IMX8MP_SYS_PLL1_800M>;
+                               assigned-clock-rates = <594000000>, <500000000>, <200000000>;
+                               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                               status = "disabled";
+
+                               lcdif_disp0: port@0 {
+                                       reg = <0>;
+
+                                       lcdif_to_dsim: endpoint {
+                                               remote-endpoint = <&dsim_from_lcdif>;
+                                       };
+                               };
+                       };
+
+               };
+
                gic: interrupt-controller@38800000 {
                        compatible = "arm,gic-v3";
                        reg = <0x38800000 0x10000>,