MLK-14325-1 ARM: dts: enable imx pcie gen2 link
authorRichard Zhu <hongxing.zhu@nxp.com>
Tue, 28 Feb 2017 01:22:23 +0000 (09:22 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:10:49 +0000 (15:10 -0500)
Set the max link capability of the imx pcie to gen2

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6qp-sabresd.dts
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/imx7d.dtsi

index ee5ac29..a78fea0 100644 (file)
                                 <&clks IMX6QDL_CLK_LVDS1_GATE>,
                                 <&clks IMX6QDL_CLK_PCIE_REF_125M>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy";
+                       fsl,max-link-speed = <2>;
                        status = "disabled";
                };
 
index 49d400c..59636a0 100644 (file)
        };
 };
 
-&pcie {
-       status = "disabled";
-};
-
 &iomuxc {
        imx6qdl-sabresd {
                pinctrl_usdhc2: usdhc2grp {
index 006a282..29f9cae 100644 (file)
                        clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
                        pcie-phy-supply = <&reg_pcie_phy>;
                        power-domains = <&gpc 2>;
+                       fsl,max-link-speed = <2>;
                        status = "disabled";
                };
        };
index 360c941..457927a 100644 (file)
                                <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
                        clock-names = "pcie", "pcie_bus", "pcie_phy";
                        pcie-phy-supply = <&reg_1p0d>;
+                       fsl,max-link-speed = <2>;
                        status = "disabled";
                };
        };