MLK-14282: 4.9 rebase: LVDS display not working on iMX6QP SabreSD

Fix IPU2 DI(Display Interface) clocks for iMX6QP SABRESD. The upstream
version uses ldb_di0_podf and ldb_di1_podf as clock parents for ipu_di,
which fails to work on iMX6QP SABRESD. This patch fixes clock tree by:
- setting ipu_di selectors to ldb_di_div_sel in imx6q clock driver
- matching "ldb_di0", "ldb_di1" clock names with
  IMX6QDL_CLK_LDB_DI0_DIV_SEL, IMX6QDL_CLK_LDB_DI1_DIV_SEL; otherwise,
  ldb_di0_div_sel and ldb_di1_div_sel will not be recognized as LDB clk parents
  and will not drive the Display Interface.

Signed-off-by: Cristina Ciocan <cristina-mihaela.ciocan@nxp.com>

diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 2d5cc6e..64c5446 100644 (file)
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -153,7 +153,7 @@
                        clocks = <&clks IMX6QDL_CLK_IPU1>,
                                 <&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
                                 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
-                                <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
+                                <&clks IMX6QDL_CLK_LDB_DI0_DIV_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_DIV_SEL>,
                                 <&clks IMX6QDL_CLK_PRG0_APB>;
                        clock-names = "bus",
                                      "di0", "di1",
@@ -166,7 +166,7 @@
                        clocks = <&clks IMX6QDL_CLK_IPU2>,
                                 <&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
                                 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
-                                <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
+                                <&clks IMX6QDL_CLK_LDB_DI0_DIV_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_DIV_SEL>,
                                 <&clks IMX6QDL_CLK_PRG1_APB>;
                        clock-names = "bus",
                                      "di0", "di1",

diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index 5046c10..6f5d683 100644 (file)
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -49,10 +49,10 @@ static const char *ipu1_di0_sels[]  = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di
 static const char *ipu1_di1_sels[]     = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
 static const char *ipu2_di0_sels[]     = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
 static const char *ipu2_di1_sels[]     = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0", "ldb_di1", };
-static const char *ipu1_di0_sels_2[]   = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
-static const char *ipu1_di1_sels_2[]   = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
-static const char *ipu2_di0_sels_2[]   = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
-static const char *ipu2_di1_sels_2[]   = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_podf", "ldb_di1_podf", };
+static const char *ipu1_di0_sels_2[]   = { "ipu1_di0_pre", "dummy", "dummy", "ldb_di0_div_sel", "ldb_di1_div_sel", };
+static const char *ipu1_di1_sels_2[]   = { "ipu1_di1_pre", "dummy", "dummy", "ldb_di0_div_sel", "ldb_di1_div_sel", };
+static const char *ipu2_di0_sels_2[]   = { "ipu2_di0_pre", "dummy", "dummy", "ldb_di0_div_sel", "ldb_di1_div_sel", };
+static const char *ipu2_di1_sels_2[]   = { "ipu2_di1_pre", "dummy", "dummy", "ldb_di0_div_sel", "ldb_di1_div_sel", };
 static const char *hsi_tx_sels[]       = { "pll3_120m", "pll2_pfd2_396m", };
 static const char *pcie_axi_sels[]     = { "axi", "ahb", };
 static const char *ssi_sels[]          = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_audio_div", };