MLK-16942-2: dts: Remove disp_apb clock rate setting

disp_apb clock is hdmi core root.
It has enabled and configurated by ROM code and
clock rate should keep in 133MHz when device bootup.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit 5dfa629c82af77408c8f0ed8f01a5e68e80899ba)

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
index 8a3b347..96302c4 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk.dts
@@ -33,16 +33,13 @@
                clock-names = "apb", "axi", "rtrm", "pixel", "dtrc";
                assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL_SRC>,
                                  <&clk IMX8MQ_CLK_DISP_AXI_SRC>,
-                                 <&clk IMX8MQ_CLK_DISP_APB_SRC>,
                                  <&clk IMX8MQ_CLK_DISP_RTRM_SRC>,
                                  <&clk IMX8MQ_CLK_DISP_RTRM_PRE_DIV>;
                assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
                                         <&clk IMX8MQ_SYS1_PLL_800M>,
-                                        <&clk IMX8MQ_SYS2_PLL_125M>,
                                         <&clk IMX8MQ_SYS1_PLL_800M>;
                assigned-clock-rates = <594000000>,
                                       <800000000>,
-                                      <125000000>,
                                       <400000000>,
                                       <400000000>;