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MLK-13119-1 ARM: dts: imx6q: add vpu clock for cpu frequency
authorAnson Huang <Anson.Huang@nxp.com>
Thu, 25 Aug 2016 12:43:33 +0000 (20:43 +0800)
committerLeonard Crestez <leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:31:07 +0000 (02:31 +0300)
When VPU is running at 396MHz, need to increase
VDDSOC_CAP voltage for all cpu set-points, so add
vpu clock node for cpufreq driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Srikanth Krishnakar <Srikanth_Krishnakar@mentor.com>
arch/arm/boot/dts/imx6q.dtsi patch | blob | history

diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 012ee50..8aa5924 100644 (file)
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -46,10 +46,12 @@
                                 <&clks IMX6QDL_CLK_PLL1_SYS>,
                                 <&clks IMX6QDL_CLK_PLL1>,
                                 <&clks IMX6QDL_PLL1_BYPASS>,
-                                <&clks IMX6QDL_PLL1_BYPASS_SRC>;
+                                <&clks IMX6QDL_PLL1_BYPASS_SRC>,
+                                <&clks IMX6QDL_CLK_VPU_AXI_PODF>;
                        clock-names = "arm", "pll2_pfd2_396m", "step",
                                      "pll1_sw", "pll1_sys", "pll1",
-                                     "pll1_bypass", "pll1_bypass_src";
+                                     "pll1_bypass", "pll1_bypass_src",
+                                     "vpu_axi_podf";
                        arm-supply = <&reg_arm>;
                        pu-supply = <&reg_pu>;
                        soc-supply = <&reg_soc>;