imx8mn-ddr4-evk-rpmsg.dtb imx8mn-ddr4-evk-root.dtb imx8mn-ddr4-evk-inmate.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb imx8mp-evk-rm67191.dtb imx8mp-evk-it6263-lvds-dual-channel.dtb \
- imx8mp-evk-it6263-lvds-channel0.dtb imx8mp-evk-jdi-wuxga-lvds-panel.dtb imx8mp-evk-hdmi.dtb
+ imx8mp-evk-jdi-wuxga-lvds-panel.dtb imx8mp-evk-hdmi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb imx8mq-evk-pcie1-m2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-ak4497.dtb imx8mq-evk-audio-tdm.dtb imx8mq-evk-pdm.dtb
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2020 NXP
- */
-
-#include "imx8mp-evk.dts"
-
-/ {
- display-subsystem {
- compatible = "fsl,imx-display-subsystem";
- ports = <&lcdif2_disp>;
- };
-};
-
-&i2c2 {
- lvds_bridge: lvds-to-hdmi-bridge@4c {
- compatible = "ite,it6263";
- reg = <0x4c>;
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
-
- port {
- it6263_in: endpoint {
- remote-endpoint = <&lvds_out>;
- };
- };
- };
-};
-
-&lcdif2 {
- status = "okay";
-};
-
-&ldb {
- status = "okay";
-
- lvds-channel@0 {
- fsl,data-mapping = "jeida";
- fsl,data-width = <24>;
- status = "okay";
-
- port@1 {
- reg = <1>;
-
- lvds_out: endpoint {
- remote-endpoint = <&it6263_in>;
- };
- };
- };
-};
-
-&ldb_phy {
- status = "okay";
-};
#include "imx8mp-evk.dts"
-/ {
- display-subsystem {
- compatible = "fsl,imx-display-subsystem";
- ports = <&lcdif2_disp>;
- };
-};
-
-&i2c2 {
- lvds_bridge: lvds-to-hdmi-bridge@4c {
- compatible = "ite,it6263";
- reg = <0x4c>;
- reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- split-mode;
-
- port {
- it6263_in: endpoint {
- remote-endpoint = <&lvds_out>;
- };
- };
- };
-};
-
-&lcdif2 {
- status = "okay";
+&lvds_bridge {
+ split-mode;
};
&ldb {
- status = "okay";
fsl,dual-channel;
-
- lvds-channel@0 {
- fsl,data-mapping = "jeida";
- fsl,data-width = <24>;
- status = "okay";
-
- port@1 {
- reg = <1>;
-
- lvds_out: endpoint {
- remote-endpoint = <&it6263_in>;
- };
- };
- };
-};
-
-&ldb_phy {
- status = "okay";
};
};
};
};
-
- display-subsystem {
- compatible = "fsl,imx-display-subsystem";
- ports = <&lcdif2_disp>;
- };
};
-&lcdif2 {
- status = "okay";
-};
+/delete-node/ &lvds_bridge;
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
- fsl,data-width = <24>;
- status = "okay";
+ /delete-node/ port@1;
port@1 {
reg = <1>;
};
};
};
-
-&ldb_phy {
- status = "okay";
-};
};
};
};
+
+ lvds_bridge: lvds-to-hdmi-bridge@4c {
+ compatible = "ite,it6263";
+ reg = <0x4c>;
+ reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+
+ port {
+ it6263_in: endpoint {
+ remote-endpoint = <&lvds_out>;
+ };
+ };
+ };
};
&i2c3 {
status = "okay";
};
+&lcdif2 {
+ status = "okay";
+};
+
+&ldb {
+ status = "okay";
+
+ lvds-channel@0 {
+ fsl,data-mapping = "jeida";
+ fsl,data-width = <24>;
+ status = "okay";
+
+ port@1 {
+ reg = <1>;
+
+ lvds_out: endpoint {
+ remote-endpoint = <&it6263_in>;
+ };
+ };
+ };
+};
+
+&ldb_phy {
+ status = "okay";
+};
+
&mipi_dsi {
status = "okay";
display-subsystem {
compatible = "fsl,imx-display-subsystem";
- ports = <&lcdif1_disp>;
+ ports = <&lcdif1_disp>,
+ <&lcdif2_disp>;
};
a53_opp_table: opp-table {