MLK-14421 imx: Add pfuze pmic common init for DM pmic driver

Since the DM pmic driver has changed the driver API, add a new file
pfuze_dm.c for common pfuze100 init.

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index 1c53fb6..802b490 100644 (file)
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_IDT8T49N222A)    += idt8t49n222a_serdes_clk.o
 obj-$(CONFIG_ZM7300)           += zm7300.o
 obj-$(CONFIG_POWER_PFUZE100)   += pfuze.o
 obj-$(CONFIG_POWER_MC34VR500)  += mc34vr500.o
+obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze_dm.o
 
 obj-$(CONFIG_LS102XA_STREAM_ID)        += ls102xa_stream_id.o
 

diff --git a/board/freescale/common/pfuze.c b/board/freescale/common/pfuze.c
index 69afa83..30f6f0a 100644 (file)
--- a/board/freescale/common/pfuze.c
+++ b/board/freescale/common/pfuze.c
@@ -9,7 +9,6 @@
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 
-#ifndef CONFIG_DM_PMIC_PFUZE100
 int pfuze_mode_init(struct pmic *p, u32 mode)
 {
        unsigned char offset, i, switch_num;
@@ -92,4 +91,3 @@ struct pmic *pfuze_common_init(unsigned char i2cbus)
 
        return p;
 }
-#endif

diff --git a/board/freescale/common/pfuze.h b/board/freescale/common/pfuze.h
index 53cfc99..b4afd3d 100644 (file)
--- a/board/freescale/common/pfuze.h
+++ b/board/freescale/common/pfuze.h
@@ -1,5 +1,6 @@
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -7,7 +8,13 @@
 #ifndef __PFUZE_BOARD_HELPER__
 #define __PFUZE_BOARD_HELPER__
 
+#ifdef CONFIG_DM_PMIC_PFUZE100
+struct udevice *pfuze_common_init(void);
+int pfuze_mode_init(struct udevice *dev, u32 mode);
+
+#elif defined(CONFIG_POWER_PFUZE100)
 struct pmic *pfuze_common_init(unsigned char i2cbus);
 int pfuze_mode_init(struct pmic *p, u32 mode);
+#endif
 
 #endif

diff --git a/board/freescale/common/pfuze_dm.c b/board/freescale/common/pfuze_dm.c
new file mode 100644 (file)
index 0000000..c6af627
--- /dev/null
+++ b/board/freescale/common/pfuze_dm.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <power/pmic.h>
+#include <power/pfuze100_pmic.h>
+
+int pfuze_mode_init(struct udevice *dev, u32 mode)
+{
+       unsigned char offset, i, switch_num;
+       u32 id;
+       int ret;
+
+       id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+       id = id & 0xf;
+
+       if (id == 0) {
+               switch_num = 6;
+               offset = PFUZE100_SW1CMODE;
+       } else if (id == 1) {
+               switch_num = 4;
+               offset = PFUZE100_SW2MODE;
+       } else {
+               printf("Not supported, id=%d\n", id);
+               return -EINVAL;
+       }
+
+       ret = pmic_reg_write(dev, PFUZE100_SW1ABMODE, mode);
+       if (ret < 0) {
+               printf("Set SW1AB mode error!\n");
+               return ret;
+       }
+
+       for (i = 0; i < switch_num - 1; i++) {
+               ret = pmic_reg_write(dev, offset + i * SWITCH_SIZE, mode);
+               if (ret < 0) {
+                       printf("Set switch 0x%x mode error!\n",
+                              offset + i * SWITCH_SIZE);
+                       return ret;
+               }
+       }
+
+       return ret;
+}
+
+struct udevice *pfuze_common_init(void)
+{
+       struct udevice *dev;
+       int ret;
+       unsigned int reg, dev_id, rev_id;
+
+       ret = pmic_get("pfuze100", &dev);
+       if (ret == -ENODEV)
+               return NULL;
+
+       dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
+       rev_id = pmic_reg_read(dev, PFUZE100_REVID);
+       printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
+
+       /* Set SW1AB stanby volage to 0.975V */
+       reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
+       reg &= ~SW1x_STBY_MASK;
+       reg |= SW1x_0_975V;
+       pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
+
+       /* Set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+       reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
+       reg &= ~SW1xCONF_DVSSPEED_MASK;
+       reg |= SW1xCONF_DVSSPEED_4US;
+       pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
+
+       /* Set SW1C standby voltage to 0.975V */
+       reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
+       reg &= ~SW1x_STBY_MASK;
+       reg |= SW1x_0_975V;
+       pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
+
+       /* Set SW1C/VDDSOC step ramp up time from 16us to 4us/25mV */
+       reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
+       reg &= ~SW1xCONF_DVSSPEED_MASK;
+       reg |= SW1xCONF_DVSSPEED_4US;
+       pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
+
+       return dev;
+}