MLK-14483 mx7ulp: Fix SPLL/APLL clock rate calculation issue

The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.

Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)

diff --git a/arch/arm/cpu/armv7/mx7ulp/scg.c b/arch/arm/cpu/armv7/mx7ulp/scg.c
index d759d72..77ab1a9 100644 (file)
--- a/arch/arm/cpu/armv7/mx7ulp/scg.c
+++ b/arch/arm/cpu/armv7/mx7ulp/scg.c
@@ -505,7 +505,9 @@ u32 decode_pll(enum pll_clocks pll)
                num = readl(&scg1_regs->spllnum);
                denom = readl(&scg1_regs->splldenom);
 
-               return (infreq / pre_div) * (mult + num / denom);
+               infreq = infreq / pre_div;
+
+               return infreq * mult + infreq * num / denom;
 
        case PLL_A7_APLL:
                reg = readl(&scg1_regs->apllcsr);
@@ -532,7 +534,9 @@ u32 decode_pll(enum pll_clocks pll)
                num = readl(&scg1_regs->apllnum);
                denom = readl(&scg1_regs->aplldenom);
 
-               return (infreq / pre_div) * (mult + num / denom);
+               infreq = infreq / pre_div;
+
+               return infreq * mult + infreq * num / denom;
 
        case PLL_USB:
                reg = readl(&scg1_regs->upllcsr);