MLK-17790-1: dts: add clocks for CI_PI subsystme

Because QXP will drop parent clock info of CI_PI SS
after system suspend/resume, so driver need to record
the relationship of clocks.

Reviewed-by: sandor.yu <sandor.yu@nxp.com>
Signed-off-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
(cherry picked from commit d4b94c2b128850bed8ec4c00ce0c0e3f86a05fcd)

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
index 840540e..3e4bd84 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
@@ -1725,8 +1725,11 @@
                        compatible = "fsl,mxc-parallel-csi";
                        reg = <0x0 0x58261000 0x0 0x1000>;
                        clocks = <&clk IMX8QXP_PARALLEL_CSI_PIXEL_CLK>,
-                                  <&clk IMX8QXP_PARALLEL_CSI_IPG_CLK>;
-                       clock-names = "pixel", "ipg";
+                                  <&clk IMX8QXP_PARALLEL_CSI_IPG_CLK>,
+                                  <&clk IMX8QXP_PARALLEL_CSI_CLK_SEL>,
+                                  <&clk IMX8QXP_PARALLEL_CSI_PER_CLK_DIV>,
+                                  <&clk IMX8QXP_PARALLEL_CSI_CLK_DPLL>;
+                       clock-names = "pixel", "ipg", "sel", "div", "dpll";
                        assigned-clocks = <&clk IMX8QXP_PARALLEL_CSI_CLK_SEL>,
                                                        <&clk IMX8QXP_PARALLEL_CSI_PER_CLK_DIV>;
                        assigned-clock-parents = <&clk IMX8QXP_PARALLEL_CSI_CLK_DPLL>;