arm: dts: add ecspi dts for imx6qp sabreauto
authorHan Xu <han.xu@nxp.com>
Thu, 7 Nov 2019 00:26:18 +0000 (18:26 -0600)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:20:42 +0000 (11:20 +0800)
add ecspi dts for imx6qp sabreauto

Signed-off-by: Han Xu <han.xu@nxp.com>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/imx6qp-sabreauto-ecspi.dts [new file with mode: 0644]

index 7c5a95f..3f24780 100644 (file)
@@ -596,6 +596,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
        imx6qp-phytec-mira-rdk-nand.dtb \
        imx6qp-sabreauto.dtb \
        imx6qp-sabreauto-flexcan1.dtb \
+       imx6qp-sabreauto-ecspi.dtb \
        imx6qp-sabresd.dtb \
        imx6qp-sabresd-btwifi.dtb \
        imx6qp-sabresd-hdcp.dtb \
diff --git a/arch/arm/boot/dts/imx6qp-sabreauto-ecspi.dts b/arch/arm/boot/dts/imx6qp-sabreauto-ecspi.dts
new file mode 100644 (file)
index 0000000..b69e758
--- /dev/null
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+//
+// Copyright (C) 2015 Freescale Semiconductor, Inc.
+
+
+#include "imx6qp-sabreauto.dts"
+
+&ecspi1 {
+       pinctrl-assert-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&can2 {
+       /* max7310_c on i2c3 is gone */
+       status = "disabled";
+};
+
+&i2c3 {
+       /* pin conflict with ecspi1 */
+       status = "disabled";
+};
+
+&uart3 {
+       /* the uart3 depends on the i2c3, so disable it too. */
+       status = "disabled";
+};
+
+&usbh1 {
+       /* max7310_b on i2c3 is gone */
+       status = "disabled";
+};
+
+&usbotg {
+       /* max7310_c on i2c3 is gone */
+       status = "okay";
+       dr_mode = "peripheral";
+};