MLK-24171-1 arm64: dts: imx8mp: verify the pcie pll sys ref clock

Verify the PCIe PLL_SYS reference clock source on EVK board.
The external OSC clock is used as PCIe REF clock source in default.
NOTE: Change the ext_osc of pcie/pcie_phy to '0' when enable SYS_PLL
clock mode.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index c047eca..7051c24 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -603,7 +603,7 @@
        pinctrl-0 = <&pinctrl_pcie>;
        disable-gpio = <&gpio2 6 GPIO_ACTIVE_LOW>;
        reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
-       ext_osc = <0>;
+       ext_osc = <1>;
        clocks = <&clk IMX8MP_CLK_HSIO_AXI_DIV>,
                 <&clk IMX8MP_CLK_PCIE_AUX>,
                 <&clk IMX8MP_CLK_PCIE_PHY>,
@@ -619,7 +619,7 @@
 &pcie_ep{
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_pcie>;
-       ext_osc = <0>;
+       ext_osc = <1>;
        clocks = <&clk IMX8MP_CLK_HSIO_AXI_DIV>,
                 <&clk IMX8MP_CLK_PCIE_AUX>,
                 <&clk IMX8MP_CLK_PCIE_PHY>,
@@ -633,6 +633,7 @@
 };
 
 &pcie_phy{
+       ext_osc = <1>;
        status = "okay";
 };
 

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 208a16b..448ff98 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1972,8 +1972,8 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
                        device_type = "pci";
-                       ranges =  <0x81000000 0 0x00000000 0x0 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
-                                  0x82000000 0 0x18000000 0x0 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+                       ranges =  <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
+                                  0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
                        num-lanes = <1>;
                        interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
                                        <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* eDMA */