USB host vbus control can be via port power(PP) bit of ehci, there
is a polarity setting in controller register for this signal, if
power supply chip use active high, add this property.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
- osc-clkgate-delay: the delay between powering up the xtal 24MHz clock
and release the clock to the digital logic inside the analog block,
0 <= osc-clkgate-delay <= 7.
+- power-polarity-active-high: add this property if port power function of ehci
+ is used to enable vbus, and the vbus power supply chip enable signal is high
+ active.
Examples: