drm/amdgpu/gmc10: fix pte mytpe field error for navi14
authortiancyin <tianci.yin@amd.com>
Tue, 16 Jul 2019 10:25:01 +0000 (18:25 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 04:19:35 +0000 (23:19 -0500)
navi14 share same PTE format with navi10.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

index 4726b51..9ab31ea 100644 (file)
@@ -1574,7 +1574,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
        flags &= ~AMDGPU_PTE_EXECUTABLE;
        flags |= mapping->flags & AMDGPU_PTE_EXECUTABLE;
 
-       if (adev->asic_type == CHIP_NAVI10) {
+       if (adev->asic_type >= CHIP_NAVI10) {
                flags &= ~AMDGPU_PTE_MTYPE_NV10_MASK;
                flags |= (mapping->flags & AMDGPU_PTE_MTYPE_NV10_MASK);
        } else {
index 42daf88..2eda3a8 100644 (file)
@@ -90,7 +90,7 @@ struct amdgpu_bo_list_entry;
                                 | AMDGPU_PTE_WRITEABLE  \
                                 | AMDGPU_PTE_MTYPE_VG10(AMDGPU_MTYPE_CC))
 
-/* NAVI10 only */
+/* gfx10 */
 #define AMDGPU_PTE_MTYPE_NV10(a)       ((uint64_t)(a) << 48)
 #define AMDGPU_PTE_MTYPE_NV10_MASK     AMDGPU_PTE_MTYPE_NV10(7ULL)